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From: "linkw at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug testsuite/107338] new test case
 gcc.dg/vect/vect-bitfield-read-7.c in r13-3413-ge10ca9544632db fails
Date: Fri, 21 Oct 2022 13:04:00 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D107338

Kewen Lin <linkw at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |ASSIGNED
           Assignee|unassigned at gcc dot gnu.org      |linkw at gcc dot gn=
u.org

--- Comment #4 from Kewen Lin <linkw at gcc dot gnu.org> ---
(In reply to avieira from comment #3)
> Hi Kewen,
>=20
> I believe you are right. I was waiting for a powerpc machine in the board
> farm, but I suspect I can reproduce this with an aarch64 BE target and I
> should be able to confirm.
>=20
> But your reasoning seems valid to me. Because of the widening the shift_n
> becomes 32-shift_n-mask_width, but the start of the bitfield didn't move =
by
> widening the container, so it is still 16 - shift_n - mask_width bits away
> from the start of the container.
>=20
> Moving the calculation before the widening seems like the neatest solution
> to me, there's no point in keeping the old type around I think.
>=20
> Do you want to produce a patch for this, seeing you solved it?

Hi Andre,

Thanks for your reply! Sure, I'll make a formal patch and do further
bootstrap/regtest on x86_64-redhat-linux, aarch64-linux-gnu and
powerpc64{,le}-linux-gnu, and post it once the testing go well.=