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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/107357] [RISC-V]RVV  broken with zve32x/f
Date: Wed, 26 Oct 2022 09:05:48 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D107357

--- Comment #1 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Kito Cheng <kito@gcc.gnu.org>:

https://gcc.gnu.org/g:7e924ba3474b96a6c0b87c38cc4fca7af8d3910c

commit r13-3505-g7e924ba3474b96a6c0b87c38cc4fca7af8d3910c
Author: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
Date:   Tue Oct 25 11:22:38 2022 +0800

    RISC-V: ADJUST_NUNITS according to -march.

    This patch fixed PR107357:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D107357

    gcc/ChangeLog:

            PR target/107357
            * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Set to minim=
um
size.
            (ADJUST_NUNITS): Adjust according to -march.
            (ADJUST_BYTESIZE): Ditto.
            * config/riscv/riscv-protos.h (riscv_v_ext_enabled_vector_mode_=
p):
            Remove.
            (riscv_v_ext_vector_mode_p): Change function implementation.
            * config/riscv/riscv-vector-builtins.cc
(rvv_switcher::rvv_switcher):
            Change to riscv_v_ext_vector_mode_p.
            (register_builtin_type): Ditto.
            * config/riscv/riscv.cc (riscv_v_ext_vector_mode_p): Change to
enabled
            modes.
            (ENTRY): Ditto.
            (riscv_v_ext_enabled_vector_mode_p): Remove.
            (riscv_v_adjust_nunits): New function.
            (riscv_vector_mode_supported_p): Use riscv_v_ext_vector_mode_p
instead.
            * config/riscv/riscv.h (riscv_v_adjust_nunits): New function.=