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From: "orzel at freehackers dot org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/107364] [10/11/12/13 Regression] ICE on Via Nehemiah with --march=native
Date: Mon, 24 Oct 2022 13:00:43 +0000 [thread overview]
Message-ID: <bug-107364-4-0SOGlWG6Kb@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-107364-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107364
--- Comment #2 from Thomas Capricelli <orzel at freehackers dot org> ---
Sure, easy
chopin /tmp # ./cpuid
__get_cpuid(0): eax=1, ebx=1953391939, ecx=1936487777, edx=1215460705
__get_cpuid(1): eax=1683, ebx=0, ecx=0, edx=58765629
I't not better in hexa ? :
__get_cpuid(0): eax=1, ebx=746e6543, ecx=736c7561, edx=48727561
__get_cpuid(1): eax=693, ebx=0, ecx=0, edx=380b13d
(what would be a lot less easy, is to recompile gcc.. it takes days on this
machine)
there's also this command available:
CPU 0:
vendor_id = "CentaurHauls"
version information (1/eax):
processor type = primary processor (0)
family = 0x6 (6)
model = 0x9 (9)
stepping id = 0x3 (3)
extended family = 0x0 (0)
extended model = 0x0 (0)
(family synth) = 0x6 (6)
(model synth) = 0x9 (9)
(simple synth) = VIA C3 / Eden ESP 7000/8000/10000 (Nehemiah C5XL),
.13um
miscellaneous (1/ebx):
process local APIC physical ID = 0x0 (0)
maximum IDs for CPUs in pkg = 0x0 (0)
CLFLUSH line size = 0x0 (0)
brand index = 0x0 (0)
brand id = 0x00 (0): unknown
feature information (1/edx):
x87 FPU on chip = true
VME: virtual-8086 mode enhancement = false
DE: debugging extensions = true
PSE: page size extensions = true
TSC: time stamp counter = true
RDMSR and WRMSR support = true
PAE: physical address extensions = false
MCE: machine check exception = false
CMPXCHG8B inst. = true
APIC on chip = false
SYSENTER and SYSEXIT = false
MTRR: memory type range registers = true
PTE global bit = true
MCA: machine check architecture = false
CMOV: conditional move/compare instr = true
PAT: page attribute table = false
PSE-36: page size extension = false
PSN: processor serial number = false
CLFLUSH instruction = false
DS: debug store = false
ACPI: thermal monitor and clock ctrl = false
MMX Technology = true
FXSAVE/FXRSTOR = true
SSE extensions = true
SSE2 extensions = false
SS: self snoop = false
hyper-threading / multi-core supported = false
TM: therm. monitor = false
IA64 = false
PBE: pending break event = false
feature information (1/ecx):
PNI/SSE3: Prescott New Instructions = false
PCLMULDQ instruction = false
DTES64: 64-bit debug store = false
MONITOR/MWAIT = false
CPL-qualified debug store = false
VMX: virtual machine extensions = false
SMX: safer mode extensions = false
Enhanced Intel SpeedStep Technology = false
TM2: thermal monitor 2 = false
SSSE3 extensions = false
context ID: adaptive or shared L1 data = false
SDBG: IA32_DEBUG_INTERFACE = false
FMA instruction = false
CMPXCHG16B instruction = false
xTPR disable = false
PDCM: perfmon and debug = false
PCID: process context identifiers = false
DCA: direct cache access = false
SSE4.1 extensions = false
SSE4.2 extensions = false
x2APIC: extended xAPIC support = false
MOVBE instruction = false
POPCNT instruction = false
time stamp counter deadline = false
AES instruction = false
XSAVE/XSTOR states = false
OS-enabled XSAVE/XSTOR = false
AVX: advanced vector extensions = false
F16C half-precision convert instruction = false
RDRAND instruction = false
hypervisor guest status = false
extended processor signature (0x80000001/eax):
generation = 0x0 (0)
model = 0x0 (0)
stepping = 0x0 (0)
(simple synth) = unknown
extended feature flags (0x80000001/edx):
x87 FPU on chip = false
virtual-8086 mode enhancement = false
debugging extensions = false
page size extensions = false
time stamp counter = false
RDMSR and WRMSR support = false
physical address extensions = false
machine check exception = false
CMPXCHG8B inst. = false
APIC on chip = false
SYSCALL and SYSRET instructions = false
memory type range registers = false
global paging extension = false
machine check architecture = false
conditional move/compare instruction = false
page attribute table = false
page size extension = false
multiprocessing capable = false
AMD multimedia instruction extensions = false
MMX Technology = false
extended MMX = false
SSE extensions = false
AA-64 = false
3DNow! instruction extensions = false
3DNow! instructions = false
brand = "VIA Nehemiah"
L1 TLB/cache information: 2M/4M pages & L1 TLB (0x80000005/eax):
instruction # entries = 0x0 (0)
instruction associativity = 0x0 (0)
data # entries = 0x0 (0)
data associativity = 0x0 (0)
L1 TLB/cache information: 4K pages & L1 TLB (0x80000005/ebx):
instruction # entries = 0x80 (128)
instruction associativity = 0x8 (8)
data # entries = 0x80 (128)
data associativity = 0x8 (8)
L1 data cache information (0x80000005/ecx):
line size (bytes) = 0x20 (32)
lines per tag = 0x1 (1)
associativity = 0x4 (4)
size (KB) = 0x40 (64)
L1 instruction cache information (0x80000005/edx):
line size (bytes) = 0x20 (32)
lines per tag = 0x1 (1)
associativity = 0x4 (4)
size (KB) = 0x40 (64)
L2 TLB/cache information: 2M/4M pages & L2 TLB (0x80000006/eax):
instruction # entries = 0x0 (0)
instruction associativity = L2 off (0)
data # entries = 0x0 (0)
data associativity = L2 off (0)
L2 TLB/cache information: 4K pages & L2 TLB (0x80000006/ebx):
instruction # entries = 0x0 (0)
instruction associativity = L2 off (0)
data # entries = 0x0 (0)
data associativity = L2 off (0)
L2 unified cache information (0x80000006/ecx):
line size (bytes) = 0x20 (32)
lines per tag = 0x1 (1)
associativity = 16-way (8)
size (KB) = 0x40 (64)
L3 cache information (0x80000006/edx):
line size (bytes) = 0x0 (0)
lines per tag = 0x0 (0)
associativity = L2 off (0)
size (in 512KB units) = 0x0 (0)
0xc0000001 0x00: eax=0x00000000
extended feature flags (0xc0000001/edx):
alternate instruction set = true
alternate instruction set enabled = false
random number generator = true
random number generator enabled = true
LongHaul MSR 0000_110Ah = true
FEMMS = false
advanced cryptography engine (ACE) = false
advanced cryptography engine (ACE)enabled = false
montgomery multiplier/hash (ACE2) = false
montgomery multiplier/hash (ACE2) enabled = false
padlock hash engine (PHE) = false
padlock hash engine (PHE) enabled = false
padlock montgomery mult. (PMM) = false
padlock montgomery mult. (PMM) enabled = false
(multi-processing synth) = none
(multi-processing method) = Generic leaf 1 no multi-threading
(uarch synth) = VIA C3, .13um
(synth) = VIA C3 / Eden ESP 7000/8000/10000 (Nehemiah C5XL), .13um
next prev parent reply other threads:[~2022-10-24 13:01 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-23 10:47 [Bug c/107364] New: " orzel at freehackers dot org
2022-10-23 23:58 ` [Bug target/107364] [10/11/12/13 Regression] " pinskia at gcc dot gnu.org
2022-10-24 8:02 ` marxin at gcc dot gnu.org
2022-10-24 13:00 ` orzel at freehackers dot org [this message]
2022-10-24 13:36 ` marxin at gcc dot gnu.org
2022-10-24 13:40 ` marxin at gcc dot gnu.org
2022-10-24 18:26 ` cvs-commit at gcc dot gnu.org
2022-10-24 18:27 ` [Bug target/107364] [10/11/12 " marxin at gcc dot gnu.org
2022-10-24 19:52 ` orzel at freehackers dot org
2022-10-24 20:18 ` orzel at freehackers dot org
2022-10-24 20:30 ` marxin at gcc dot gnu.org
2022-10-24 20:38 ` hjl.tools at gmail dot com
2022-10-24 20:46 ` orzel at freehackers dot org
2022-10-25 3:55 ` cvs-commit at gcc dot gnu.org
2022-10-25 3:56 ` cvs-commit at gcc dot gnu.org
2022-10-25 4:18 ` cvs-commit at gcc dot gnu.org
2022-10-25 4:24 ` cvs-commit at gcc dot gnu.org
2022-10-25 4:24 ` cvs-commit at gcc dot gnu.org
2022-10-25 4:25 ` cvs-commit at gcc dot gnu.org
2022-10-25 4:29 ` marxin at gcc dot gnu.org
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