From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 1AE953858414; Thu, 3 Nov 2022 13:18:53 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 1AE953858414 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1667481533; bh=ifji4HOgTJgG4HStS9EHppNXd0/LBo/KTvll8pOY0LY=; h=From:To:Subject:Date:In-Reply-To:References:From; b=oRiyOp+Exc+7Bz8j6KwwYK/poYHyYChlmma8nxQi2YR1aJbwCT65TjxFTo+kdOj1C AWGLIpcM1DXnbNUuhVdMQaCyjN1TXyu6ED4JGJjAyHLgUJgfjYyZVptUWMz7YCA5IZ z/q61kNL+BVV0aOVtixKBTcDkZKsy94JMggzO77U= From: "cvs-commit at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/107404] [12/13 Regression] Wrong code with -O3 since r12-6416-g037cc0b4a6646cc8 Date: Thu, 03 Nov 2022 13:18:52 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 13.0 X-Bugzilla-Keywords: wrong-code X-Bugzilla-Severity: normal X-Bugzilla-Who: cvs-commit at gcc dot gnu.org X-Bugzilla-Status: ASSIGNED X-Bugzilla-Resolution: X-Bugzilla-Priority: P2 X-Bugzilla-Assigned-To: ubizjak at gmail dot com X-Bugzilla-Target-Milestone: 12.3 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D107404 --- Comment #6 from CVS Commits --- The master branch has been updated by Uros Bizjak : https://gcc.gnu.org/g:553b1d3dd5b9253ebdf66ee3260c717d5b807dd1 commit r13-3624-g553b1d3dd5b9253ebdf66ee3260c717d5b807dd1 Author: Uros Bizjak Date: Thu Nov 3 14:17:42 2022 +0100 i386: Fix uninitialized register after peephole2 conversion [PR107404] The eliminate reg-reg move by inverting the condition of a cmove #2 peephole2 converts the following sequence: 473: bx:DI=3D[r14:DI*0x8+r12:DI] 960: r15:DI=3Dr8:DI 485: {flags:CCC=3Dcmp(r15:DI+bx:DI,bx:DI);r15:DI=3Dr15:DI+bx:DI;} 737: r15:DI=3D{(geu(flags:CCC,0))?r15:DI:bx:DI} to: 1110: {flags:CCC=3Dcmp(r8:DI+bx:DI,bx:DI);r8:DI=3Dr8:DI+bx:DI;} 1111: r15:DI=3D[r14:DI*0x8+r12:DI] 1112: r15:DI=3D{(geu(flags:CCC,0))?r8:DI:r15:DI} Please note that(insn 1110) uses register BX, but its initialization was eliminated. Avoid conversion if eliminated move intialized a register, used in the moved instruction. 2022-11-03 Uro=C3=85=C2=A1 Bizjak gcc/ChangeLog: PR target/107404 * config/i386/i386.md (eliminate reg-reg move by inverting the condition of a cmove #2 peephole2): Check if eliminated move initialized a register, used in the moved instruction. gcc/testsuite/ChangeLog: PR target/107404 * g++.target/i386/pr107404.C: New test.=