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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug target/107628] ICE: SIGSEGV in commutative_operand_precedence (rtlanal.cc:3770) with -fsignaling-nans Date: Sat, 19 Nov 2022 09:17:41 +0000 [thread overview] Message-ID: <bug-107628-4-a3PtxuQFQY@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-107628-4@http.gcc.gnu.org/bugzilla/> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107628 --- Comment #2 from CVS Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Jakub Jelinek <jakub@gcc.gnu.org>: https://gcc.gnu.org/g:b1115dbfea4d6df51d608cece7416d658d2e2822 commit r13-4162-gb1115dbfea4d6df51d608cece7416d658d2e2822 Author: Jakub Jelinek <jakub@redhat.com> Date: Sat Nov 19 10:17:01 2022 +0100 i386: Outline fast BF -> SF conversion and fix up sNaN handling in it [PR107628] On Fri, Oct 21, 2022 at 10:23:14AM +0200, Uros Bizjak wrote: > OK, but now we have two more copies of a function that effectively > extends BF to SF. Can you please split this utility function out and > use it here and in cbranchbf4/cstorebf4? I'm talking about this part: > > + op = gen_lowpart (HImode, op1); > + if (CONST_INT_P (op)) > + op = simplify_const_unary_operation (FLOAT_EXTEND, SFmode, > + op1, BFmode); > + else > + { > + rtx t1 = gen_reg_rtx (SImode); > + emit_insn (gen_zero_extendhisi2 (t1, op)); > + emit_insn (gen_ashlsi3 (t1, t1, GEN_INT (16))); > + op = gen_lowpart (SFmode, t1); > + } > > Taking this a bit further, it looks like a generic function to extend > BF to SF, when extendbfsf2 named function is not defined. > > The above could be a follow-up patch, the proposed patch is OK. Sorry for the delay, only got to this now. And I'm fixing the sNaN handling in it too. If the argument is a BFmode sNaN constant, we want in this case just a SFmode sNaN constant, but simplify_const_unary_operation (FLOAT_EXTEND, ...) in that case returns NULL (as normally conversions of a sNaN to some other float type should raise an exception). In this case we want to bypass that, as we know the sNaN will be used immediately in the SFmode comparison a few instructions later. The patch fixes it by just simplifying the lowpart to HImode and its zero extension to SImode, then force into a pseudo and do the left shift and subreg to SFmode on the pseudo. CSE or combine can handle it later. 2022-11-19 Jakub Jelinek <jakub@redhat.com> PR target/107628 * config/i386/i386-protos.h (ix86_expand_fast_convert_bf_to_sf): Declare. * config/i386/i386-expand.cc (ix86_expand_fast_convert_bf_to_sf): New function. * config/i386/i386.md (cbranchbf4, cstorebf4): Use it. * gcc.target/i386/pr107628.c: New test.
next prev parent reply other threads:[~2022-11-19 9:17 UTC|newest] Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-11-11 6:32 [Bug rtl-optimization/107628] New: " zsojka at seznam dot cz 2022-11-18 12:19 ` [Bug target/107628] " jakub at gcc dot gnu.org 2022-11-19 9:17 ` cvs-commit at gcc dot gnu.org [this message] 2022-11-19 9:20 ` jakub at gcc dot gnu.org 2022-11-28 22:31 ` pinskia at gcc dot gnu.org
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