From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 673733899035; Tue, 15 Nov 2022 16:19:03 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 673733899035 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1668529143; bh=r9SajX5UP9HoZP3Mc7jY7daEP1zfdZ8PJvmn9rO+kYA=; h=From:To:Subject:Date:In-Reply-To:References:From; b=g8952JphPxDGQIK0I9kdadQPiBDzoWNh5zdN0fywARzNvKXmsTc2Pg+1mL0ZKrdzH ynpP+pTCxRs51cJsGzgXeRyMjQyqQ2waDjTVU6Vgc2CECrrZx4CzVcB+ay+0xWjmDZ Mtm4+LPvAyLw1WKQHe43V2jYjdP3czk0Ndx3qTrw= From: "ibuclaw at gdcproject dot org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/107671] i386: Missed optimization: use of bt in bit test pattern (using -O2 -mtune=core2) Date: Tue, 15 Nov 2022 16:19:02 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 13.0 X-Bugzilla-Keywords: missed-optimization X-Bugzilla-Severity: normal X-Bugzilla-Who: ibuclaw at gdcproject dot org X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D107671 --- Comment #5 from Iain Buclaw --- (In reply to Uro=C5=A1 Bizjak from comment #4) > from: > movl %esi, %ecx > movl $1, %eax > sall %cl, %eax > testl %edi, %eax > setne %al > movzbl %al, %eax >=20 > to: > xorl %eax, %eax > btl %esi, %edi > setc %al >=20 > The patch adapts *jcc_bt patterns to similar *scc_bt patterns. Thanks, have been tinkering with the pointer index version, and found that I can coax scc_bt_mask to match if I cast the lhs to a signed type. It's not obvious to me why there would be a difference. return ((__INT32_TYPE__)p[bitnum >> 5] & (1 << (bitnum & 31))) !=3D 0; movl %esi, %eax shrl $5, %eax movl (%rdi,%rax,4), %eax btl %esi, %eax setc %al Things get even stranger once I expand to "bit test and op" variants though (better to put in another PR though) __INT32_TYPE__ btc32(__UINT32_TYPE__ *p, __UINT32_TYPE__ bitnum) { __INT32_TYPE__ result =3D ((__INT32_TYPE__)p[bitnum >> 5] & (1 << (bitnum & 31))) !=3D 0; p[bitnum >> 5] ^=3D 1 << (bitnum & 31); return result; } Patch changes code-gen in the following way. from: movl %esi, %eax movl %esi, %ecx shrl $5, %eax leaq (%rdi,%rax,4), %rdx movl (%rdx), %eax movl %eax, %esi sarl %cl, %eax btcl %ecx, %esi andl $1, %eax movl %esi, (%rdx) to: movl %esi, %eax shrl $5, %eax leaq (%rdi,%rax,4), %rdx movl (%rdx), %eax movl %eax, %ecx btcl %esi, %ecx btl %esi, %eax setc %al movl %ecx, (%rdx) movzbl %al, %eax=