[Bug target/108247] New: Missed opportunity to generate shNadd on risc-v

["law at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108247

            Bug ID: 108247
           Summary: Missed opportunity to generate shNadd on risc-v
           Product: gcc
           Version: 13.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: law at gcc dot gnu.org
                CC: rzinsly at ventanamicro dot com
  Target Milestone: ---
            Target: risc-v

int sub2(int a, long long b) {
  b = (b << 32) >> 31;
  unsigned int x = a + b;
  return x;
}


When compiled with Zba should ideally generate something like this:

  sh1add  a0, a1, a0
  sext.w  a0, a0
  ret


I suspect we need to match something like this as a define_split:

Failed to match this instruction:
(set (reg:SI 142 [ x ])
    (plus:SI (subreg:SI (and:DI (ashift:DI (reg:DI 146)
                    (const_int 1 [0x1]))
                (const_int 4294967294 [0xfffffffe])) 0)
        (subreg:SI (reg:DI 145) 0)))


Or this:


(set (reg:DI 144 [ x ])
    (sign_extend:DI (plus:SI (subreg:SI (and:DI (ashift:DI (reg:DI 146)
                        (const_int 1 [0x1]))
                    (const_int 4294967294 [0xfffffffe])) 0)
            (subreg:SI (reg:DI 145) 0))))