From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 78DBD3858434; Thu, 20 Apr 2023 14:50:18 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 78DBD3858434 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1682002218; bh=/HmPVLktBk9tW7YlMfZ40dn9nBOMdGIgKDw7MJtV4iI=; h=From:To:Subject:Date:In-Reply-To:References:From; b=OzdYW2MYA2AKKsTILyBaETsyElyizTGHdllwJYWyc+IcLk9a0pFtobdT7mxwyM1hL 1A6MuARHuaOxQbTo7CCjBROCIB+f27xHxGgEQh4HoOBxVGFNPhs7zkZg/B6uF6AGrK tqqscQiyNCnJ7TgN78dA8LcEIF6ZT16772BPhHuk= From: "cvs-commit at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/108248] Some insns in the risc-v backend do not have mappings to functional units Date: Thu, 20 Apr 2023 14:50:17 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 13.0 X-Bugzilla-Keywords: X-Bugzilla-Severity: normal X-Bugzilla-Who: cvs-commit at gcc dot gnu.org X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D108248 --- Comment #7 from CVS Commits --- The master branch has been updated by Jeff Law : https://gcc.gnu.org/g:07e2576d6f344acab338deeb051845c90c1cf6a3 commit r14-116-g07e2576d6f344acab338deeb051845c90c1cf6a3 Author: Raphael Zinsly Date: Thu Apr 20 08:48:08 2023 -0600 [PR target/108248] [RISC-V] Break down some bitmanip insn types This is primarily Raphael's work. All I did was adjust it to apply to = the trunk and add the new types to generic.md's scheduling model. The basic idea here is to make sure we have the ability to schedule the bitmanip instructions with a finer degree of control. Some of the bitm= anip instructions are likely to have differing scheduler characteristics acr= oss different implementations. So rather than assign these instructions a generic "bitmanip" type, this patch assigns them a type based on their RTL code by using the iterator for the type. Naturally we have to add a few new types. It affects clz, ctz, cpop, min, max. We didn't do this for things like shNadd, single bit manipulation, etc.= We certainly could if the needs presents itself. I threw all the new types into the generic_alu bucket in the generic scheduling model. Seems as good a place as any. Someone who knows the sifive uarch should probably add these types (and bitmanip) to the sifi= ve scheduling model. We also noticed that the recently added orc.b didn't have a type at all. So we added it as a generic bitmanip type. This has been bootstrapped in a gcc-12 base and I've built and run the testsuite without regressions on the trunk. Given it was primarily Raphael's work I could probably approve & commit= it. But I'd like to give the other RISC-V folks a chance to chime in. PR target/108248 gcc/ * config/riscv/bitmanip.md (clz, ctz, pcnt, min, max patterns):= Use as the type to allow for fine grained control of scheduling these insns. * config/riscv/generic.md (generic_alu): Add bitmanip, clz, ctz, pcnt, min, max. * config/riscv/riscv.md (type attribute): Add types for clz, ct= z, pcnt, signed and unsigned min/max.=