[Bug target/108659] Suboptimal 128 bit atomics codegen on AArch64 and x64

["wilco at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108659

Wilco <wilco at gcc dot gnu.org> changed:

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--- Comment #5 from Wilco <wilco at gcc dot gnu.org> ---
(In reply to Andrew Pinski from comment #4)
> (In reply to Niall Douglas from comment #3) 
> > You may be interested in reading https://reviews.llvm.org/D110069. It wanted
> > to have LLVM generate a 128 bit AArch64 CAS for atomics. LLVM merged that
> > change, it'll be in the next release.
> 
> Using CAS for atomic load is not valid thing to do ...
> Because atomic load from constant rodata needs to work.
> LLVM breaks this case as they don't care about it. GCC does though.

The question is how useful is this in reality? If memory is not writeable then
you can use atomic loads but no other atomic accesses.

We could be pragmatic and say that using 128-bit atomic loads from
non-writeable memory is a user error just like unaligned atomic accesses.

To me a far worse issue is that this difference for 128-bit atomics means that
LLVM and GCC are binary incompatible. AFAIK isn't an option to make them
compatible either (on AArch64 GCC13 will use a compatible sequence only if LSE2
is available).