From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 47E69385842B; Tue, 14 Feb 2023 19:30:48 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 47E69385842B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1676403048; bh=XMjHYNutf6q6lDDntsri3auWRdQv1NxuoJjaKqJikCY=; h=From:To:Subject:Date:In-Reply-To:References:From; b=JSRmuOjSq+A8hOtQP6eS8H9UnISPsR98L2BId2ROwuN9b6QM55eyUmMqi5kqE8Yv0 Q5Jsg+zGjN+kjDN9PLfUs9VGEAoLIRWwTjlqU6nrt9LQpCG2GYohymbiiv9NmCT6/u QiiYUc13mRDzhLvvXzaX+DGufNpACQrCpwZ9KUlI= From: "jakub at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/108787] [13 Regression] libsodium miscompilation on power9 starting with r13-2107 Date: Tue, 14 Feb 2023 19:30:48 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 13.0 X-Bugzilla-Keywords: X-Bugzilla-Severity: normal X-Bugzilla-Who: jakub at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P1 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: 13.0 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D108787 --- Comment #6 from Jakub Jelinek --- --- gcc/config/rs6000/rs6000.md.jj 2023-01-16 11:52:16.036734757 +0100 +++ gcc/config/rs6000/rs6000.md 2023-02-14 19:46:13.915782702 +0100 @@ -3231,20 +3231,38 @@ (plus:TI (mult:TI (any_extend:TI (match_operand:DI 1 "gpc_reg_operand")) (any_extend:TI (match_operand:DI 2 "gpc_reg_operand"))) - (any_extend:TI (match_operand:DI 3 "gpc_reg_operand"))))] + (match_operand:TI 3 "gpc_reg_operand")))] "TARGET_MADDLD && TARGET_POWERPC64" { rtx op0_lo =3D gen_rtx_SUBREG (DImode, operands[0], BYTES_BIG_ENDIAN ? 8= : 0); rtx op0_hi =3D gen_rtx_SUBREG (DImode, operands[0], BYTES_BIG_ENDIAN ? 0= : 8); + rtx op3_lo =3D gen_rtx_SUBREG (DImode, operands[3], BYTES_BIG_ENDIAN ? 8= : 0); + rtx op3_hi =3D gen_rtx_SUBREG (DImode, operands[3], BYTES_BIG_ENDIAN ? 0= : 8); + rtx hi_temp =3D gen_reg_rtx (DImode); - emit_insn (gen_maddlddi4 (op0_lo, operands[1], operands[2], operands[3])= ); + emit_insn (gen_maddlddi4 (op0_lo, operands[1], operands[2], op3_lo)); if (BYTES_BIG_ENDIAN) - emit_insn (gen_madddi4_highpart (op0_hi, operands[1], operands[2], - operands[3])); + emit_insn (gen_madddi4_highpart (hi_temp, operands[1], operands[2], + op3_lo)); else - emit_insn (gen_madddi4_highpart_le (op0_hi, operands[1], operands[2= ], - operands[3])); + emit_insn (gen_madddi4_highpart_le (hi_temp, operands[1], operands[= 2], + op3_lo)); + + if ( =3D=3D SIGN_EXTEND) + { + rtx sgn =3D gen_reg_rtx (DImode); + rtx hi_temp2 =3D gen_reg_rtx (DImode); + + emit_insn (gen_lshrdi3 (sgn, op3_lo, GEN_INT (63))); + + emit_insn (gen_adddi3 (hi_temp2, hi_temp, sgn)); + + hi_temp =3D hi_temp2; + } + + emit_insn (gen_adddi3 (op0_hi, hi_temp, op3_hi)); + DONE; }) gets it functionally correct. But given __attribute__((noipa)) unsigned __int128 foo (unsigned long long x, unsigned long long y, unsigned __int128 z) { return (unsigned __int128) x * y + z; } __attribute__((noipa)) __int128 bar (long long x, long long y, __int128 z) { return (__int128) x * y + z; } __attribute__((noipa)) unsigned __int128 baz (unsigned long long x, unsigned long long y, unsigned long long z) { return (unsigned __int128) x * y + z; } __attribute__((noipa)) __int128 qux (long long x, long long y, long long z) { return (__int128) x * y + z; } we used to emit in GCC 12 4/4/4/5 instructions: mulld 9,3,4 mulhdu 4,3,4 addc 3,9,5 adde 4,4,6 and mulld 9,3,4 mulhd 4,3,4 addc 3,9,5 adde 4,4,6 and mulld 9,3,4 mulhdu 4,3,4 addc 3,9,5 addze 4,4 and mulld 9,3,4 mulhd 4,3,4 sradi 10,5,63 addc 3,9,5 adde 4,4,10 Now, with the patch we get 3/5/3/6 instructions: maddhdu 9,3,4,5 maddld 3,3,4,5 add 4,9,6 and maddhd 9,3,4,5 srdi 10,5,63 maddld 3,3,4,5 add 9,9,10 add 4,9,6 and mr 9,3 maddld 3,3,4,5 maddhdu 4,9,4,5 and maddhd 9,3,4,5 srdi 8,5,63 sradi 10,5,63 maddld 3,3,4,5 add 9,9,8 add 4,9,10 So, unless we can somehow check for the sign extended operands[3], we shoul= dn't define maddditi3 or FAIL in it or expand it to equivalent of what we used to emit before.=