From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id BB78F3858D32; Mon, 27 Feb 2023 10:35:51 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org BB78F3858D32 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1677494151; bh=FNg9dKeuz28bm8WsuCEPCTNjP5v+11XizdZMUu/kydI=; h=From:To:Subject:Date:From; b=FreNMhmaa1h8OGMxPdM8Qq3pUMhet2SRfX9Dkh77oyiuVgmofx+lSjqSa+Rx9JS+b XmzglqujwvnbZYW3S6ukfZ96hE2dAB+OvZDyuHrcgZNrymXGPEPxiHkDmWOl3yid1c mgD63jJPYpLnxeeUPUyYsV7nE59yG2or1/G478go= From: "gcc@dynamic-noise.net" To: gcc-bugs@gcc.gnu.org Subject: [Bug c/108943] New: ARM Unaligned memory access with high optimizer levels Date: Mon, 27 Feb 2023 10:35:50 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: new X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: c X-Bugzilla-Version: 12.2.0 X-Bugzilla-Keywords: X-Bugzilla-Severity: normal X-Bugzilla-Who: gcc@dynamic-noise.net X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: bug_id short_desc product version bug_status bug_severity priority component assigned_to reporter target_milestone Message-ID: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D108943 Bug ID: 108943 Summary: ARM Unaligned memory access with high optimizer levels Product: gcc Version: 12.2.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: c Assignee: unassigned at gcc dot gnu.org Reporter: gcc@dynamic-noise.net Target Milestone: --- Hello, the following MWE program, extracted from my production code, is compiled to machine code with unaligned memory accesses for ARM Cortex-M7 with optimizer mode -O2 and -O3, but *not* with -O1: #include static int calculateStuff(const uint8_t *bytes); int main(void) { uint8_t *frame =3D (uint8_t*)0x240008d0; return calculateStuff(&frame[1]); } int calculateStuff(const uint8_t *bytes) { return (int)((bytes[0] << 8) | bytes[1]); } Compiled with: arm-none-eabi-gcc -c -O3 \ -mcpu=3Dcortex-m7 -mthumb \ -Wall -Wextra \ -o mwe.o mwe.c No warnings except unused main arguments. My production code where I found this behavior did not trigger any traps when compiling with -fsanitize=3Dundefined. No changes when compiling with -fno-strict-aliasing, -fno-aggressive-loop-optimizations and -fwrapv. So I do not assume there is undefined behaviour I am unaware of. Disassembly of object file (with my annotations) 00000000
: ; Optimizer Level -O2 0: 4b02 ldr r3, [pc, #8] ; (c ) ; Tries to load half-word from address 0x240008d1, ; which is not allowed for ldrh instruction. 2: f8b3 00d1 ldrh.w r0, [r3, #209] ; 0xd1=20=20 6: ba40 rev16 r0, r0 8: b280 uxth r0, r0 a: 4770 bx lr c: 24000800 strcs r0, [r0], #-2048 ; 0xfffff800 GCC seems to assume that a byte-order-swap is attempted and thus assumes that the pointer is aligned. Compiling with -O1 uses two loads and shift operators. 00000000
: ; Optimizer Level -O1 0: 4b03 ldr r3, [pc, #12] ; (10 ) 2: f893 00d1 ldrb.w r0, [r3, #209] ; 0xd1 6: f893 30d2 ldrb.w r3, [r3, #210] ; 0xd2 a: ea43 2000 orr.w r0, r3, r0, lsl #8 e: 4770 bx lr 10: 24000800 strcs r0, [r0], #-2048 ; 0xfffff800 GCC Version and Target Information: arm-none-eabi-gcc -v: Using built-in specs. COLLECT_GCC=3Darm-none-eabi-gcc COLLECT_LTO_WRAPPER=3D/usr/lib/gcc/arm-none-eabi/12.2.0/lto-wrapper Target: arm-none-eabi Configured with: /build/arm-none-eabi-gcc/src/gcc-12.2.0/configure --target=3Darm-none-eabi --prefix=3D/usr --with-sysroot=3D/usr/arm-none-eabi --with-native-system-header-dir=3D/include --libexecdir=3D/usr/lib --enable-languages=3Dc,c++ --enable-plugins --disable-decimal-float --disable-libffi --disable-libgomp --disable-libmudflap --disable-libquadma= th --disable-libssp --disable-libstdcxx-pch --disable-nls --disable-shared --disable-threads --disable-tls --with-gnu-as --with-gnu-ld --with-system-z= lib --with-newlib --with-headers=3D/usr/arm-none-eabi/include --with-python-dir=3Dshare/gcc-arm-none-eabi --with-gmp --with-mpfr --with-m= pc --with-isl --with-libelf --enable-gnu-indirect-function --with-host-libstdcxx=3D'-static-libgcc -Wl,-Bstatic,-lstdc++,-Bdynamic -lm' --with-pkgversion=3D'Arch Repository' --with-bugurl=3Dhttps://bugs.archlinu= x.org/ --with-multilib-list=3Drmprofile Thread model: single Supported LTO compression algorithms: zlib zstd gcc version 12.2.0 (Arch Repository) gcc version 12.2.0 (Arch Repository)=