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From: "xry111 at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug rtl-optimization/109035] meaningless memory store on RISC-V and
 LoongArch
Date: Fri, 03 Nov 2023 06:52:26 +0000
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X-Bugzilla-Component: rtl-optimization
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X-Bugzilla-Keywords: missed-optimization
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D109035

Xi Ruoyao <xry111 at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|---                         |FIXED
             Status|NEW                         |RESOLVED

--- Comment #9 from Xi Ruoyao <xry111 at gcc dot gnu.org> ---
(In reply to Vladimir Makarov from comment #7)
> For last 2 weeks I pushed several patches for better dealing with
> equivalences in RA.
>=20
> It seems the patches solves the current PR.  I checked the test code
> generation for loongarch and aarch64 and did not find spilled pseudos whi=
ch
> are reported here.
>=20
> I think the PR should closed as fixed.

Thanks!  For LoongArch this issue has been "papered over" since r14-19 thou=
gh
it's a completely unrelated change.

I'm closing the PR as fixed anyway.=