From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id AE3143858C52; Tue, 4 Apr 2023 20:08:36 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org AE3143858C52 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1680638916; bh=kLlwCA9DsiaOqnnlA+kdMtsa/S/bbwAS/zkjImUdQIs=; h=From:To:Subject:Date:In-Reply-To:References:From; b=BS+bmczcyoPtzB/CjfIEPy45F7K1aqKQWLArjGaXJc89X6x15ePx/GGskAl2gELvF CQjcD/JHNYjcBTLaLcEoXRVoyCrpfVuSI5H5HIhEHXb/QeKiChuFP6mYN6iaNWimYs vBLRHM6F80dkYM/fwPkQyeaNsbGqTBIfStEO1Jdk= From: "ebotcazou at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/109040] [13 Regression] wrong code with v16hi compare & mask on riscv64 at -O2 since r13-4907-g2e886eef7f2b5a Date: Tue, 04 Apr 2023 20:08:36 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 13.0 X-Bugzilla-Keywords: wrong-code X-Bugzilla-Severity: normal X-Bugzilla-Who: ebotcazou at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: 13.0 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D109040 --- Comment #7 from Eric Botcazou --- WORD_REGISTER_OPERATIONS means that subword register operations in RTL are actually performed on the whole word register by the machine, e.g.. for (insn 47 35 39 2 (set (reg:HI 175) (subreg:HI (reg:SI 166) 0)) "pr109040.c":9:11 179 {*movhi_internal} (expr_list:REG_DEAD (reg:SI 166) (nil))) you can infer the MSB of (reg:SI 175) instead of them being undefined. But= I don't think that it prevents any particular instruction form.=