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From: "rguenth at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug tree-optimization/109184] [10/11/12/13 Regression] csmith: 2017
 bug with -floop-interchange
Date: Mon, 20 Mar 2023 13:00:41 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D109184

--- Comment #11 from Richard Biener <rguenth at gcc dot gnu.org> ---
Fails even with -O2 -floop-interchange -fno-move-loop-stores (otherwise we
complicate the IL by applying store-motion to g_1731).

(compute_affine_dependence
  ref_a: l_1930[k_33], stmt_a: _1 =3D l_1930[k_33];
  ref_b: g_1731[_51], stmt_b: g_1731[_51] =3D _5;
) -> no dependence
(compute_affine_dependence
  ref_a: l_1930[k_33], stmt_a: l_1930[k_33] =3D _2;
  ref_b: g_1731[_51], stmt_b: _4 =3D g_1731[_51];
) -> no dependence
(compute_affine_dependence
  ref_a: l_1930[k_33], stmt_a: l_1930[k_33] =3D _2;
  ref_b: g_1731[_51], stmt_b: g_1731[_51] =3D _5;
) -> no dependence

maybe I'm missing something but we seem to fail to honor dependences from
SSA edges?

  <bb 3> [local count: 894749066]:
  # k_33 =3D PHI <k_24(11), 0(5)>
  # ivtmp_41 =3D PHI <ivtmp_40(11), 5(5)>
  _1 =3D l_1930[k_33];
  _2 =3D _1 + 18446744073709551615;
  l_1930[k_33] =3D _2;
  _4 =3D g_1731[_51];
  _38 =3D _2 & _4;
  _5 =3D _38 & 38;
  g_1731[_51] =3D _5;
  k_24 =3D k_33 + 1;
  ivtmp_40 =3D ivtmp_41 - 1;
  if (ivtmp_40 !=3D 0)

Of course DDR_ARE_DEPENDENT (ddr) =3D=3D chrec_known just tells us there's =
no
memory dependece.

As said, maybe I'm missing something ...=