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From: "vineetg at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/109279] RISC-V: complex constants synthesized should be
 improved
Date: Tue, 15 Aug 2023 17:37:02 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D109279

--- Comment #17 from Vineet Gupta <vineetg at gcc dot gnu.org> ---
(In reply to Vineet Gupta from comment #16)
> > Which is what this produces:
> > ```
> > long long f(void)
> > {
> >   unsigned t =3D 16843009;
> >   long long t1 =3D t;
> >   long long t2 =3D ((unsigned long long )t) << 32;
> >   asm("":"+r"(t1));
> >   return t1 | t2;
> > }
> > ```

>=20
> 	li	a0,16842752
> 	addi	a0,a0,257
> 	li	a5,16842752
> 	slli	a0,a0,32
> 	addi	a5,a5,257
> 	or	a0,a5,a0
> 	ret

This is again IRA inflicted pain (similar to [PR110748]).=20
IRA seems to be undoing split1 since we have 2 insn sequences to synthesize=
 the
constant pieces. This explains why the problem got exacerbated with commit
0530254413f8 ("riscv: relax splitter restrictions for creating pseudos") si=
nce
now different regs are used to create parts of const, vs 1 reg being repeat=
edly
used for assembling a const (fooling IRA's equivalent replacement logic).=