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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug sanitizer/109594] [14 Regression] ICE verify_gimple failed with
 ASAN since r14-67-g2c800ed8d59cff
Date: Thu, 27 Apr 2023 08:38:08 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D109594

--- Comment #3 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Richard Biener <rguenth@gcc.gnu.org>:

https://gcc.gnu.org/g:7bcdcf86e8272eeb524cc1dcb0ada8c8cfe6f27e

commit r14-285-g7bcdcf86e8272eeb524cc1dcb0ada8c8cfe6f27e
Author: Richard Biener <rguenther@suse.de>
Date:   Mon Apr 24 13:20:25 2023 +0200

    tree-optimization/109594 - wrong register promotion

    We fail to verify the constraints under which we allow handled
    components to wrap registers.  The gcc.dg/pr70022.c testcase shows
    that we happily end up with

      _2 =3D VIEW_CONVERT_EXPR<int[4]>(v_1(D))

    as produced by SSA rewrite and update_address_taken.  But the intent
    was that we wrap registers with at most a single level of handled
    components and specifically only allow __real, __imag, BIT_FIELD_REF
    and VIEW_CONVERT_EXPR on them, but not ARRAY_REF or COMPONENT_REF.

    Together with the improved gimple_load predicate taking advantage
    of the above and ASAN this eventually ICEd.

    The following fixes update_address_taken as to this constraint.

            PR tree-optimization/109594
            * tree-ssa.cc (non_rewritable_mem_ref_base): Constrain
            what we rewrite to a register based on the above.=