From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <gcc-bugzilla@gcc.gnu.org>
Received: by sourceware.org (Postfix, from userid 48)
	id DE8DD3858C62; Tue,  2 May 2023 21:10:54 +0000 (GMT)
DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org DE8DD3858C62
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org;
	s=default; t=1683061854;
	bh=bf2TArUZZOJeI6FBc9msxp8EkIFnRNmNeGzJUQjQNKs=;
	h=From:To:Subject:Date:In-Reply-To:References:From;
	b=LcxPZZDBU4hxPxNfhMU2p5j6515RoUDK7mPLLWVXj+UONiNq+yy8rUsJ+qisKjV0w
	 BHz4ZZOTa8qRk6xyPIblu5mhjf1dHoOl7r6Cc4ycrwl1ePydVKX3KUpd05f+ERqpU4
	 dQboq+bHCqFepStwc+Pl39rA1c/gm2FRexOtyhGk=
From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/109657] (a ? -1 : 0) | b could be optimized better for
 aarch64
Date: Tue, 02 May 2023 21:10:54 +0000
X-Bugzilla-Reason: CC
X-Bugzilla-Type: changed
X-Bugzilla-Watch-Reason: None
X-Bugzilla-Product: gcc
X-Bugzilla-Component: target
X-Bugzilla-Version: 13.0
X-Bugzilla-Keywords: missed-optimization, patch
X-Bugzilla-Severity: enhancement
X-Bugzilla-Who: cvs-commit at gcc dot gnu.org
X-Bugzilla-Status: ASSIGNED
X-Bugzilla-Resolution: 
X-Bugzilla-Priority: P3
X-Bugzilla-Assigned-To: pinskia at gcc dot gnu.org
X-Bugzilla-Target-Milestone: ---
X-Bugzilla-Flags: 
X-Bugzilla-Changed-Fields: 
Message-ID: <bug-109657-4-qittZ16vNl@http.gcc.gnu.org/bugzilla/>
In-Reply-To: <bug-109657-4@http.gcc.gnu.org/bugzilla/>
References: <bug-109657-4@http.gcc.gnu.org/bugzilla/>
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable
X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/
Auto-Submitted: auto-generated
MIME-Version: 1.0
List-Id: <gcc-bugs.sourceware.org>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D109657

--- Comment #3 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The trunk branch has been updated by Andrew Pinski <pinskia@gcc.gnu.org>:

https://gcc.gnu.org/g:7cc33d12dca84befde69259a17fab8224e2e4025

commit r14-412-g7cc33d12dca84befde69259a17fab8224e2e4025
Author: Andrew Pinski <apinski@marvell.com>
Date:   Fri Apr 28 05:22:34 2023 +0000

    target: [PR109657] (a ? -1 : 0) | b could be optimized better for aarch=
64

    There is no canonical form for this case defined. So the aarch64 backend
needs
    a pattern to match both of these forms.

    The forms are:
    (set (reg/i:SI 0 x0)
        (if_then_else:SI (eq (reg:CC 66 cc)
                (const_int 0 [0]))
            (reg:SI 97)
            (const_int -1 [0xffffffffffffffff])))
    and
    (set (reg/i:SI 0 x0)
        (ior:SI (neg:SI (ne:SI (reg:CC 66 cc)
                    (const_int 0 [0])))
            (reg:SI 102)))

    Currently the aarch64 backend matches the first form so this
    patch adds a insn_and_split to match the second form and
    convert it to the first form.

    OK? Bootstrapped and tested on aarch64-linux-gnu with no regressions

            PR target/109657

    gcc/ChangeLog:

            * config/aarch64/aarch64.md (*cmov<mode>_insn_m1): New
            insn_and_split pattern.

    gcc/testsuite/ChangeLog:

            * gcc.target/aarch64/csinv-2.c: New test.=