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From: "pinskia at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/109900] New: _mm256_abs_epi8 is not expanded on gimple
 level
Date: Wed, 17 May 2023 23:20:40 +0000
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X-Bugzilla-Product: gcc
X-Bugzilla-Component: target
X-Bugzilla-Version: 14.0
X-Bugzilla-Keywords: missed-optimization
X-Bugzilla-Severity: enhancement
X-Bugzilla-Who: pinskia at gcc dot gnu.org
X-Bugzilla-Status: UNCONFIRMED
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X-Bugzilla-Priority: P3
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D109900

            Bug ID: 109900
           Summary: _mm256_abs_epi8 is not expanded on gimple level
           Product: gcc
           Version: 14.0
            Status: UNCONFIRMED
          Keywords: missed-optimization
          Severity: enhancement
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: pinskia at gcc dot gnu.org
  Target Milestone: ---
            Target: x86_64-linux-gnu

Take (at -O3 -march=3Dx86-64-v3):
```
#include <immintrin.h>
__m256i
should_be_cmpeq_abs0 ()
{
  return _mm256_set1_epi8 (1);
}
__m256i
should_be_cmpeq_abs1 ()
{
  return _mm256_abs_epi8(_mm256_set1_epi8 (-1));
}
```
I would have expected these two produce the same code generation.
In the end, we still have a builtin function in the IR rather than ABS_EXPR.
The RTL level uses abs.
In fact combine tries to combine the two instructions:
Trying 5 -> 6:
    5: r85:V32QI=3Dconst_vector
    6: r84:V32QI=3Dabs(r85:V32QI)
      REG_DEAD r85:V32QI
      REG_EQUAL const_vector
Failed to match this instruction:
(set (reg:V32QI 84)
    (const_vector:V32QI [
            (const_int 1 [0x1]) repeated x32
        ]))=