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From: "pinskia at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug middle-end/109907] Missed optimization for bit extraction (uses
 shift instead of single bit-test)
Date: Sat, 20 May 2023 00:46:48 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D109907

--- Comment #9 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
(In reply to Georg-Johann Lay from comment #6)
> Quite impressive improvement.  Maybe the last step can be achieved with a
> combiner pattern that combines extzv with a bit flip.
>=20
> One problem is usually that there is no canonical form (sometimes
> zero_extract, sometimes shift+and, sometimes with subregs for extraction =
or
> paradoxical subregs for wider types, different behaviour for MSB, etc.).

Right, In this case combine tries:
(set (reg/i:QI 24 r24)
    (zero_extract:QI (xor:QI (reg:QI 54)
            (const_int 64 [0x40]))
        (const_int 1 [0x1])
        (const_int 6 [0x6])))

Which puts the xor inside the zero_extract even but I think you could handle
that once my patch set goes in.=