From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 6829E3858438; Wed, 24 May 2023 08:53:24 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 6829E3858438 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1684918404; bh=IN/PgSzdxkBMfsvAdOgXB3OWe3Ss5QfTUfJWgaM3Y0Q=; h=From:To:Subject:Date:In-Reply-To:References:From; b=gIVcw6mEdFUobaOQJMXZOjtPnhSQ0HYEpFSqLsg37kqvsxA7gJyMLqLfMuoPnVISy YD1GTvf6fIEEXsvovocYP1TaU4pn7FTeJBKr439sZDS84t+pCMtqYHOGkf28r0wiSt J6VvpW8RJ6UUB5wMIMUOxS0BbmlV5Zozsg2EaSuI= From: "cvs-commit at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug rtl-optimization/109940] [14 Regression] ICE in decide_candidate_validity since g:53dddbfeb213ac4ec39f550aa81eaa4264375d2c Date: Wed, 24 May 2023 08:53:24 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: rtl-optimization X-Bugzilla-Version: 14.0 X-Bugzilla-Keywords: ice-on-valid-code X-Bugzilla-Severity: normal X-Bugzilla-Who: cvs-commit at gcc dot gnu.org X-Bugzilla-Status: ASSIGNED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: rsandifo at gcc dot gnu.org X-Bugzilla-Target-Milestone: 14.0 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D109940 --- Comment #5 from CVS Commits --- The trunk branch has been updated by Richard Sandiford : https://gcc.gnu.org/g:ee2a8b373a88bae4c533aa68bed56bf01afea0e2 commit r14-1157-gee2a8b373a88bae4c533aa68bed56bf01afea0e2 Author: Richard Sandiford Date: Wed May 24 09:53:12 2023 +0100 early-remat: Resync with new DF postorders [PR109940] When I wrote early-remat, the DF_FORWARD block order was a postorder of a reverse/backward walk (i.e. of the inverted cfg), rather than a reverse postorder of a forward walk. A postorder of a backward walk lacked the important property that dominators come before the blocks they dominate; instead it ensures that postdominators come after the blocks that they postdominate. The DF_BACKWARD block order was similarly a postorder of a forward walk. Since early-remat wanted a standard postorder and reverse postorder with normal dominator properties, it used the DF_BACKWARD order instead of the DF_FORWARD order. g:53dddbfeb213ac4ec39f fixed the DF orders so that DF_FORWARD was an RPO of a forward walk and so that DF_BACKWARD was an RPO of a backward walk. This meant that iterating backwards over the DF_BACKWARD order had the exact problem that the original DF_FORWARD order had, triggering a flurry of ICEs for SVE. This fixes the build with SVE enabled. It also fixes an ICE in g++.target/aarch64/sve/pr99766.C with normal builds. I've included the test from the PR as well, for extra coverage. gcc/ PR rtl-optimization/109940 * early-remat.cc (postorder_index): Rename to... (rpo_index): ...this. (compare_candidates): Sort by decreasing rpo_index rather than increasing postorder_index. (early_remat::sort_candidates): Calculate the forward RPO from DF_FORWARD. (early_remat::local_phase): Follow forward RPO using DF_FORWARD, rather than DF_BACKWARD in reverse. gcc/testsuite/ * gcc.dg/torture/pr109940.c: New test.=