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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/110088] [avr] Improve operation with const on l-reg
 after move from d-reg
Date: Fri, 02 Jun 2023 10:42:53 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D110088

--- Comment #1 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Georg-Johann Lay <gjl@gcc.gnu.org>:

https://gcc.gnu.org/g:7bf89a919fdab9e18b7ad3efaa1a79f1d7520ddf

commit r14-1492-g7bf89a919fdab9e18b7ad3efaa1a79f1d7520ddf
Author: Georg-Johann Lay <avr@gjlay.de>
Date:   Fri Jun 2 12:41:07 2023 +0200

    target/110088: Improve operation of l-reg with const after move from d-=
reg.

    After reload, there may be sequences like
       lreg =3D dreg
       lreg =3D lreg <op> const
    with an LD_REGS dreg, non-LD_REGS lreg, and <op> in PLUS, IOR, AND.
    If dreg dies after the first insn, it is possible to use
       dreg =3D dreg <op> const
       lreg =3D dreg
    instead which is more efficient.

    gcc/
            PR target/110088
            * config/avr/avr.md: Add an RTL peephole to optimize operations=
 on
            non-LD_REGS after a move from LD_REGS.
            (piaop): New code iterator.=