From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id C1F6B3858430; Tue, 29 Aug 2023 17:15:34 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org C1F6B3858430 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1693329334; bh=cD0S2uvkxhGe1QtQjJY62dOPh8wXTt9cPkNN6uVC1ww=; h=From:To:Subject:Date:In-Reply-To:References:From; b=BfKkTfdgj1S0ooe3DsMgbIRPEfsH86SD+hsCWx3CF7oSYuOd4RRXtSkEfHMEvBjRB TgUCm9DjNzXzvdq7w0Trt8k+VrnmL3mF3K9bWQpqrruhWsceBTKzaDK12k/sXohAJY mpvYeZ5Mch3K6FfLxv73VaV4lUruHWzk4g0sSExg= From: "vmakarov at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug rtl-optimization/110093] [12/13/14 Regression][avr] Move frenzy leading to code bloat Date: Tue, 29 Aug 2023 17:15:32 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: rtl-optimization X-Bugzilla-Version: 14.0 X-Bugzilla-Keywords: missed-optimization, needs-bisection, ra X-Bugzilla-Severity: normal X-Bugzilla-Who: vmakarov at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: 12.4 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D110093 --- Comment #3 from Vladimir Makarov --- I worked on avr issues quite some time. And here is my findings. Before IRA we have start of BB2: ;; lr in 14 [r14] 15 [r15] 16 [r16] 17 [r17] 18 [r18] 19 [r19] 20 [= r20] 21 [r21] 22 [r22] 23 [r23] 24 [r24] 25 [r25] 28 [r28] 32 [__SP_L__] 34 [arg= L] 44 45 46 33: r51:QI=3Dr22:QI REG_DEAD r22:QI 34: r52:QI=3Dr23:QI REG_DEAD r23:QI 35: r53:QI=3Dr24:QI REG_DEAD r24:QI 36: r54:QI=3Dr25:QI REG_DEAD r25:QI 37: r44:SI#0=3Dr51:QI REG_DEAD r51:QI 38: r44:SI#1=3Dr52:QI REG_DEAD r52:QI 39: r44:SI#2=3Dr53:QI REG_DEAD r53:QI 40: r44:SI#3=3Dr54:QI REG_DEAD r54:QI According GCC pseudo r44 conflicts with r51, r52 ... In reality it is not. I could modify BB live analysis in IRA although it is a lot of work. But there is a bigger problem. A lot of passes including IRA uses data-flow analysis framework for global life analysis and it does not work on subreg level. You can see that r44 still lives (lr in) at the beginning of BB2. DFA is not my responsibility but I can say modifying DFA this way is a huge project as it will affect a lot of targets. Instead, as AVR regs are very small, I propose to avoid the above RTL code by switching off subreg3 pass (or -fsplit-wide-types) for AVR by default as it was for gcc-8. There is still one minor problem: an additional reg-reg move generation for= the test case in comparison with gcc-8. I'll try to fix it.=