From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id BBC51385B534; Thu, 26 Oct 2023 05:30:39 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org BBC51385B534 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1698298239; bh=mPCB126aZWDRLA6Hd5xjjpXZxJqEHbe497LQEpy08Q8=; h=From:To:Subject:Date:In-Reply-To:References:From; b=KqMzvgH4SRWpBG8I1tJjge+8etMgPlwVjh4Y707QM4ySLQpULgmn1p1x0s15Do8kd 4EDp3YJsoL/ddx0MdGH6dlgtRTu9Q6W2JX/iZGtoR3cuh0oOrvlNorUxPRNKcG6nf6 7ag4IjYljXMkSFYNuVtay6o68RdOvDwp+0iZXZNY= From: "cvs-commit at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/110170] Sub-optimal conditional jumps in conditional-swap with floating point Date: Thu, 26 Oct 2023 05:30:38 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 14.0 X-Bugzilla-Keywords: missed-optimization X-Bugzilla-Severity: normal X-Bugzilla-Who: cvs-commit at gcc dot gnu.org X-Bugzilla-Status: RESOLVED X-Bugzilla-Resolution: FIXED X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D110170 --- Comment #22 from CVS Commits --- The releases/gcc-12 branch has been updated by hongtao Liu : https://gcc.gnu.org/g:1e36498710f9ca84fefa578863cf505f484601b1 commit r12-9944-g1e36498710f9ca84fefa578863cf505f484601b1 Author: liuhongt Date: Wed Jul 5 13:45:11 2023 +0800 Disparage slightly for the alternative which move DFmode between SSE_RE= GS and GENERAL_REGS. For testcase void __cond_swap(double* __x, double* __y) { bool __r =3D (*__x < *__y); auto __tmp =3D __r ? *__x : *__y; *__y =3D __r ? *__y : *__x; *__x =3D __tmp; } GCC-14 with -O2 and -march=3Dx86-64 options generates the following cod= e: __cond_swap(double*, double*): movsd xmm1, QWORD PTR [rdi] movsd xmm0, QWORD PTR [rsi] comisd xmm0, xmm1 jbe .L2 movq rax, xmm1 movapd xmm1, xmm0 movq xmm0, rax .L2: movsd QWORD PTR [rsi], xmm1 movsd QWORD PTR [rdi], xmm0 ret rax is used to save and restore DFmode value. In RA both GENERAL_REGS and SSE_REGS cost zero since we didn't disparage the alternative in movdf_internal pattern, according to register allocation order, GENERAL_REGS is allocated. The patch add ? for alternative (r,v) and (v,r) just like we did for movsf/hf/bf_internal pattern, after that we get optimal RA. __cond_swap: .LFB0: .cfi_startproc movsd (%rdi), %xmm1 movsd (%rsi), %xmm0 comisd %xmm1, %xmm0 jbe .L2 movapd %xmm1, %xmm2 movapd %xmm0, %xmm1 movapd %xmm2, %xmm0 .L2: movsd %xmm1, (%rsi) movsd %xmm0, (%rdi) ret gcc/ChangeLog: PR target/110170 * config/i386/i386.md (movdf_internal): Disparage slightly for 2 alternatives (r,v) and (v,r) by adding constraint modifier '?'. gcc/testsuite/ChangeLog: * gcc.target/i386/pr110170-3.c: New test. (cherry picked from commit 37a231cc7594d12ba0822077018aad751a6fb94e)=