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From: "joseph.weening at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/110227] New: gcc generates invalid AVX-512 code
Date: Mon, 12 Jun 2023 14:47:58 +0000
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X-Bugzilla-Version: 13.1.0
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D110227

            Bug ID: 110227
           Summary: gcc generates invalid AVX-512 code
           Product: gcc
           Version: 13.1.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: joseph.weening at gmail dot com
  Target Milestone: ---

gcc version 13.1.0 (GCC)
Target: x86_64-pc-linux-gnu
Configured with: ../gcc-13.1.0/configure --prefix=3D/usr/local/gcc/13.1.0
--disable-multilib --enable-languages=3Dc,c++,fortran
--with-gmp=3D/usr/local/gmp/6.2.1 --with-mpc=3D/usr/local/mpc/1.3.1
--with-mpfr=3D/usr/local/mpfr/4.2.0 --with-isl=3D/usr/local/isl/0.24

The following program generates an error:
  /tmp/ccAuHFqz.s: Assembler messages:
  /tmp/ccAuHFqz.s:28: Error: unsupported instruction `vpcmpeqd'
The assembly code contains
        vpcmpeqd         %xmm16, %xmm16, %xmm16
which perhaps is invalid for xmm registers above 15.

#include <immintrin.h>

__attribute__((noinline))
static void vswap(int32_t *x) {
  __m256i x0 =3D _mm256_loadu_si256((__m256i *) (&x[0]));
  __m256i x1 =3D _mm256_loadu_si256((__m256i *) (&x[1]));
  _mm256_storeu_si256((__m256i *) (&x[0]),(x1));
  _mm256_storeu_si256((__m256i *) (&x[1]),(x0));
}

void vproc(int32_t *x) {
  for (int32_t p=3D4; p>=3D1; p>>=3D1) {
    if (p =3D=3D 4) {
      __m256i mask =3D _mm256_set_epi32(0, 0, 0, 0, -1, -1, -1, -1);
      __m256i x0 =3D _mm256_loadu_si256((__m256i *) (&x[0]));
      x0 =3D _mm256_xor_si256(x0, mask);
      _mm256_storeu_si256((__m256i *) (&x[0]),(x0));
    }
    vswap(x);
  }
}=