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From: "ams at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/110313] [14 Regression] GCN Fiji reload ICE in 'process_alt_operands'
Date: Tue, 20 Jun 2023 15:56:12 +0000	[thread overview]
Message-ID: <bug-110313-4-1IqxZMA6bk@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-110313-4@http.gcc.gnu.org/bugzilla/>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110313

--- Comment #5 from Andrew Stubbs <ams at gcc dot gnu.org> ---
One thing that is unusual about the GCN stack pointer is that it's actually two
registers. Could this be breaking some cprop assumptions?

GCN can't fit an address in one (SImode) register so all (DImode) pointers
require a pair of registers. We had to rework the dwarf stack representation
code for this architecture, so I'm pretty sure no other port does this.

  parent reply	other threads:[~2023-06-20 15:56 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-19 15:59 [Bug target/110313] New: " tschwinge at gcc dot gnu.org
2023-06-20  8:11 ` [Bug target/110313] " rguenth at gcc dot gnu.org
2023-06-20  9:13 ` ams at gcc dot gnu.org
2023-06-20  9:21 ` tschwinge at gcc dot gnu.org
2023-06-20  9:41 ` ams at gcc dot gnu.org
2023-06-20 15:36 ` tschwinge at gcc dot gnu.org
2023-06-20 15:56 ` ams at gcc dot gnu.org [this message]
2023-06-20 20:57 ` burnus at gcc dot gnu.org
2023-06-20 21:48 ` burnus at gcc dot gnu.org
2023-06-20 22:55 ` burnus at gcc dot gnu.org
2023-06-21  6:49 ` manolis.tsamis at vrull dot eu
2023-06-21  7:25 ` tschwinge at gcc dot gnu.org
2023-06-21  8:45 ` burnus at gcc dot gnu.org
2023-06-28 14:06 ` cvs-commit at gcc dot gnu.org

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