From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 9B9943858D33; Mon, 26 Jun 2023 14:58:14 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 9B9943858D33 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1687791494; bh=xK8OSlc1iDVDdvXnGOzjoaSTtIirozxCg3ck76v/T+M=; h=From:To:Subject:Date:In-Reply-To:References:From; b=lYCOpMssqqiaMmDe+AEU5+dSLO4Kec/DwJAAgV7r4oOIdmwB4isSDPqr4E8J4YLK4 4dzyKiMRvoJF7VLiU7nxO4oxdjYJGo1F/xE4tt8x7gDNmiRTV+5rW6/gcXlKncGuwJ t/51c59DqC6p7m6Elg7jE2BonDG8TkjBoXeEyfUY= From: "bergner at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/110411] ICE on simple memcpy test case when allowing generation of vector pair load/store insns Date: Mon, 26 Jun 2023 14:58:14 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 14.0 X-Bugzilla-Keywords: ice-on-valid-code X-Bugzilla-Severity: normal X-Bugzilla-Who: bergner at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: keywords cc everconfirmed bug_status cf_reconfirmed_on cf_gcctarget Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D110411 Peter Bergner changed: What |Removed |Added ---------------------------------------------------------------------------- Keywords| |ice-on-valid-code CC| |linkw at gcc dot gnu.org, | |meissner at gcc dot gnu.or= g, | |segher at gcc dot gnu.org Ever confirmed|0 |1 Status|UNCONFIRMED |NEW Last reconfirmed| |2023-06-26 Target| |powerpc*-*-* --- Comment #1 from Peter Bergner --- I'll note this was reported by our Linux kernel team. The problem here is the expression we assign to src ends up looking like an altivec and:DI memory address and that type of address is invalid for a lxvp/stxvp instruction. fwprop seems to be creating it: propagating insn 7 into insn 9, replacing: (set (reg:DI 123 [ src ]) (and:DI (reg:DI 122) (reg:DI 124 [ ptr ]))) successfully matched this instruction to anddi3_mask: (set (reg:DI 123 [ src ]) (and:DI (reg:DI 124 [ ptr ]) (const_int -16 [0xfffffffffffffff0]))) rescanning insn with uid =3D 9. updating insn 9 in-place verify found no changes in insn with uid =3D 9. propagating insn 9 into insn 10, replacing: (set (reg:OO 125 [ MEM [(void *)src_4] ]) (mem:OO (reg:DI 123 [ src ]) [0 MEM [(void *)src_4]+0 S32 A128])) successfully matched this instruction to *movoo: (set (reg:OO 125 [ MEM [(void *)src_4] ]) (mem:OO (and:DI (reg:DI 124 [ ptr ]) (const_int -16 [0xfffffffffffffff0])) [0 MEM [(void *)src_4]+0 S32 A128])) Clearly, movoo shouldn't allow these types of addresses.=