From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 483B43858C00; Thu, 29 Jun 2023 08:03:19 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 483B43858C00 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1688025799; bh=CJXbN3GfHqv/dYCmkycLK+xNmxhW6mUWrkWEuR5I5FY=; h=From:To:Subject:Date:From; b=gOev9WoOt30f19Nt3Pl2gUQXBU3NCbp+1dAE144ToRqDEZNgceXwRFhL7H3jKJK5j hRcjSzogaUu9ofmMWJoWuc0RwsQqEN1scI4hTfVEdwl+2X/sAVRtmuTactXLDQJ/Vr 2eFEyAQpnvQQ/Q1ylZD8Nox9pP3Is03MWil9ci0Y= From: "tkoenig at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug rtl-optimization/110479] New: Unnecessary register move Date: Thu, 29 Jun 2023 08:03:18 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: new X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: rtl-optimization X-Bugzilla-Version: unknown X-Bugzilla-Keywords: X-Bugzilla-Severity: enhancement X-Bugzilla-Who: tkoenig at gcc dot gnu.org X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: bug_id short_desc product version bug_status bug_severity priority component assigned_to reporter target_milestone Message-ID: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D110479 Bug ID: 110479 Summary: Unnecessary register move Product: gcc Version: unknown Status: UNCONFIRMED Severity: enhancement Priority: P3 Component: rtl-optimization Assignee: unassigned at gcc dot gnu.org Reporter: tkoenig at gcc dot gnu.org Target Milestone: --- May be related to / a dup of PR110240. The function unsigned int bar(unsigned int a) { return 1u << (((a >> 10) & 3) + 3); } is compiled, with a relatively recent trunk and -O3, to bar: .LFB12: .cfi_startproc shrl $10, %edi movl $1, %eax movl %edi, %ecx andl $3, %ecx addl $3, %ecx sall %cl, %eax ret where the register move seems unnecessary.=