From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id EFCD73858D38; Mon, 17 Jul 2023 11:26:04 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org EFCD73858D38 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1689593164; bh=Bo18Wc4mTDukOsrbjeGtdS0HAqrJ9dJWYyy63dke+VY=; h=From:To:Subject:Date:In-Reply-To:References:From; b=rXatwRAgRPa2nPvTROxrMPYcVFGB/GrExzruQDtbqSK0QpzPzdvRa5p26kP/2JwcB N/+Aqpvbflpn5SG0FrHTsZDVesyOBgrH2fdqz+hNoezlHFIzb9ntGMLqELWxI/zzAu iY5wXyxSGYa77+50l+PmO+zVi4rVaVMsqzaf3Z04= From: "roger at nextmovesoftware dot com" To: gcc-bugs@gcc.gnu.org Subject: [Bug rtl-optimization/110587] [14 regression] 96% pr28071.c compile time regression since r14-2337-g37a231cc7594d1 Date: Mon, 17 Jul 2023 11:26:04 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: rtl-optimization X-Bugzilla-Version: 14.0 X-Bugzilla-Keywords: compile-time-hog, ra X-Bugzilla-Severity: normal X-Bugzilla-Who: roger at nextmovesoftware dot com X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: 14.0 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: cc see_also Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D110587 Roger Sayle changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |roger at nextmovesoftware = dot com See Also| |https://gcc.gnu.org/bugzill | |a/show_bug.cgi?id=3D88873 --- Comment #9 from Roger Sayle --- I'll check whether turning off the insvti_{low,high}part transformations du= ring lra_in_progress helps compile-time. I believe everytime reload encounters a TI<->SSE SUBREG, the spill/reload generates two or three additional instructions. I'm thinking that perhaps this should ideally be an UNSPEC, = that we can split after reload. As shown in PR 88873, we'd like SSE->TI->SSE to avoid going via memory [where currently this happens twice]. It looks like "interval" in pr28071.c suffers from the same x86 ABI issues [i.e. is place= d in scalar TImode, where ideally we'd like V2DI].=