[Bug target/110748] RISC-V: optimize store of DF 0.0

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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110748

--- Comment #14 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Vineet Gupta <vineetg@gcc.gnu.org>:

https://gcc.gnu.org/g:ecfa870ff29d979bd2c3d411643b551f2b6915b0

commit r14-2731-gecfa870ff29d979bd2c3d411643b551f2b6915b0
Author: Vineet Gupta <vineetg@rivosinc.com>
Date:   Thu Jul 20 11:15:37 2023 -0700

    RISC-V: optim const DF +0.0 store to mem [PR/110748]

    Fixes: ef85d150b5963 ("RISC-V: Enable TARGET_SUPPORTS_WIDE_INT")

    DF +0.0 is bitwise all zeros so int x0 store to mem can be used to optimize
it.

    void zd(double *) { *d = 0.0; }

    currently:

    | fmv.d.x fa5,zero
    | fsd     fa5,0(a0)
    | ret

    With patch

    | sd      zero,0(a0)
    | ret

    The fix updates predicate const_0_operand() so reg_or_0_operand () now
    includes const_double, enabling movdf expander -> riscv_legitimize_move ()
    to generate below vs. an intermediate set (reg:DF) const_double:DF

    | (insn 6 3 0 2 (set (mem:DF (reg/v/f:DI 134 [ d ])
    |        (const_double:DF 0.0 [0x0.0p+0]))

    This change also enables such insns to be recog() by later passes.
    The md pattern "*movdf_hardfloat_rv64" despite already supporting the
    needed constraints {"m","G"} mem/const 0.0 was failing to match because
    the additional condition check reg_or_0_operand() was failing due to
    missing const_double.

    This failure to recog() was triggering an ICE when testing the in-flight
    f-m-o patches and is how all of this started, but then was deemed to be
    an independent optimization of it's own [1].

    [1] https://gcc.gnu.org/pipermail/gcc-patches/2023-July/624857.html

    Its worthwhile to note all the set peices were already there and working
    up until my own commit mentioned at top regressed the whole thing.

    Ran thru full multilib testsuite and no surprises. There was 1 false
    failure due to random string "lw" appearing in lto build assembler output,
    which is also fixed here.

    gcc/ChangeLog:

            PR target/110748
            * config/riscv/predicates.md (const_0_operand): Add back
            const_double.

    gcc/testsuite/ChangeLog:

            * gcc.target/riscv/pr110748-1.c: New Test.
            * gcc.target/riscv/xtheadfmv-fmv.c: Add '\t' around test
            patterns to avoid random string matches.

    Signed-off-by: Vineet Gupta <vineetg@rivosinc.com>