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From: "vineetg at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/110748] RISC-V: optimize store of DF 0.0
Date: Fri, 21 Jul 2023 21:40:10 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D110748

--- Comment #11 from Vineet Gupta <vineetg at gcc dot gnu.org> ---
There's a variation which can be optimized as well and seems non trivial to
implement

Now it is the negative constant -0.0 to be stored to mem. In bit notation t=
his
has a single sign bit set thus can be optimized using a bseti if rv64gc_zbs.

void znd(double *d) { *d =3D -0.0; }
void znf(float *f)  { *f =3D -0.0; }

llvm optim these to

znd(double*):
        bseti   a1, zero, 63
        sd      a1, 0(a0)
        ret

znf(float*):
        lui     a1, 0x80000
        sw      a1, 0(a0)
        ret

While gcc resorts to constant pool for both

        lui     a5,%hi(.LANCHOR0)
        fld     fa5,%lo(.LANCHOR0)(a5)
        fsd     fa5,0(a0)
        ret
        .set    .LANCHOR0,. + 0
.LC0:
        .word   0
        .word   -2147483648=