From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 72C90385AFA2; Thu, 20 Jul 2023 06:50:39 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 72C90385AFA2 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1689835839; bh=kwnr/5CQCBd1FvgC/crvJ+dFCRacSsCkcBz//nX5W2Y=; h=From:To:Subject:Date:In-Reply-To:References:From; b=PhejwNJJlign6qZwfD9edmUVswGaS4Ex0kigawKqFLvQTNPx5WDu992PXxQrieKHv vPwyl0Mlo4EeinGEMU5Suszx6gJDJ5hSS1ycH+s0cCT8bhDv/GwqnMl+GxJKF0yAO+ SETatR9DIoNV5ioCI4OIqlcXAqe/l30nKyMAjt/4= From: "vineetg at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/110748] RISC-V: optimize store of DF 0.0 Date: Thu, 20 Jul 2023 06:50:39 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 13.0 X-Bugzilla-Keywords: X-Bugzilla-Severity: normal X-Bugzilla-Who: vineetg at gcc dot gnu.org X-Bugzilla-Status: ASSIGNED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D110748 --- Comment #3 from Vineet Gupta --- Indeed the constraint already exists (define_insn "*movdf_hardfloat_rv64" [(set (match_operand:DF 0 "nonimmediate_operand" "=3Df,f,f,m,m,*f,*r,=20 *r,*r,*m") ^^ (match_operand:DF 1 "move_operand" " f,G,m,f,G,*r,*f,*r*G,*m,*r") ^^ )] At expand time: gen_movdf() -> riscv_legitimize_move forces a reg, as reg_or_0_operand () returns false. Breakpoint 7, riscv_legitimize_move (mode=3DE_DFmode, dest=3D0x7ffff6db9af8, src=3D0x7ffff6c0c050) at ../../gcc/gcc/config/riscv/riscv.cc:2162 2162 { (gdb) call debug_rtx(dest) (mem:DF (reg/v/f:DI 134 [ d ]) [1 *d_2(D)+0 S8 A64]) (gdb) call debug_rtx(src) (const_double:DF 0.0 [0x0.0p+0]) 2232 if (!register_operand (dest, mode) && !reg_or_0_operand (src, mode)) (gdb) n 2257 reg =3D force_reg (mode, src); (gdb)=20 2258 riscv_emit_move (dest, reg); (gdb)=20 2259 return true; While for int 0, reg_or_0_operand returns true.=