From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 817BB3858C2B; Thu, 20 Jul 2023 09:30:13 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 817BB3858C2B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1689845413; bh=O36/eJZEe1Fbt7Jh3Oycmc34pjXem//sZ8eG7u51GGA=; h=From:To:Subject:Date:In-Reply-To:References:From; b=MgXKlX8ID2ehNV23rIA8gy6yszR2GAGkBPrhK8Ud2VgIImrR66lk4UK/Zgli687dq F2o//p7OTAZxvqKV/1nR325uqUe/nVR1cU5s0KrPlRxPpffJ3fbZxeMNLi4PJys4qF hD0k/kqcB35cven/1/jOh5owrReSLnOwX0Fwpuj4= From: "rguenth at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/110751] RISC-V: Suport undefined value that allows VSETVL PASS use TA/MA Date: Thu, 20 Jul 2023 09:30:12 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 14.0 X-Bugzilla-Keywords: X-Bugzilla-Severity: normal X-Bugzilla-Who: rguenth at gcc dot gnu.org X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: cf_gcctarget Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D110751 Richard Biener changed: What |Removed |Added ---------------------------------------------------------------------------- Target| |riscv --- Comment #2 from Richard Biener --- AVX512 can do zeroing or merging (with existing destination contents) for masked ops, on the GIMPLE side merging would need another source operand so what we effectively only support is zeroing for AVX512. I see aarch64 SVE picks the value from specific operands where I'm assuming that's what the ISA implements (only). For any suggestion can you please elaborate on what MU/TU and TA/MA are? Searching for two-letter things in the RVV spec has way to many hits to find the relevant parts of the spec. If 'undefined' means there's ISA that leaves the choice to implementors and that's usually "cheaper" then rather than a new undef_type I always point to 'error_mark_node' that could be used but you also need a representation on the RTL side. I'd also like to add that 'undefined' is in the end always problematic for an IL. I would assume that in case 'undefined' allows the implementation to completely skip operating on a vector subpart, like not issue it, the actual value will be what's already in the target register so it looks like "merge" to me but for not skipped subparts that adds a data dependence on the previous (sub-)register contents (not an issue for "skipped" parts).=