From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <gcc-bugzilla@gcc.gnu.org>
Received: by sourceware.org (Postfix, from userid 48)
	id 7CA2F3858C52; Thu,  4 Apr 2024 17:25:28 +0000 (GMT)
DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 7CA2F3858C52
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org;
	s=default; t=1712251528;
	bh=vioeT1k2iTspfp05biIGb00DYIimvDV8x+GbUplP5yE=;
	h=From:To:Subject:Date:In-Reply-To:References:From;
	b=gihHWmyiD3kZRRSd+gpwlSq/W5a5M7/OTKAG4uPmnB4UJf7xxO14Au7oKDEdwSLZS
	 ltCz/1DyEIyDT8bCkhqhg3lGaXjWogFGkeGxywzEHEc6T7ztceCvPLJqEhLZffimRu
	 7BDA+a/gngTodwFPWONbnXMaZI+Uo09qBdEyBjhM=
From: "wilco at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug middle-end/110773] [Aarch64] crash (SIGBUS) due to atomic
 instructions on under-aligned memory
Date: Thu, 04 Apr 2024 17:25:27 +0000
X-Bugzilla-Reason: CC
X-Bugzilla-Type: changed
X-Bugzilla-Watch-Reason: None
X-Bugzilla-Product: gcc
X-Bugzilla-Component: middle-end
X-Bugzilla-Version: 14.0
X-Bugzilla-Keywords: wrong-code
X-Bugzilla-Severity: normal
X-Bugzilla-Who: wilco at gcc dot gnu.org
X-Bugzilla-Status: UNCONFIRMED
X-Bugzilla-Resolution: 
X-Bugzilla-Priority: P3
X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org
X-Bugzilla-Target-Milestone: ---
X-Bugzilla-Flags: 
X-Bugzilla-Changed-Fields: 
Message-ID: <bug-110773-4-wKdygLS5rI@http.gcc.gnu.org/bugzilla/>
In-Reply-To: <bug-110773-4@http.gcc.gnu.org/bugzilla/>
References: <bug-110773-4@http.gcc.gnu.org/bugzilla/>
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable
X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/
Auto-Submitted: auto-generated
MIME-Version: 1.0
List-Id: <gcc-bugs.sourceware.org>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D110773

--- Comment #6 from Wilco <wilco at gcc dot gnu.org> ---
(In reply to Sainan from comment #5)
> (In reply to Wilco from comment #4)
> > The atomic will also set correct struct alignment.
>=20
> My thinking was that maybe this is not the case (=3D standard library iss=
ue)
> since both GCC and Clang seem to be causing this issue, but manually addi=
ng
> alignas(16) also didn't help.
>=20
> > You would get a crash if you build for LSE so you get a LDADDAL instruc=
tion
> > and then run it on a CPU that doesn't. So try -mcpu=3Dnative and it sho=
uld
> > work.
>=20
> -mcpu=3Dnative didn't fix the SIGBUS, only removed __aarch64_ldadd4_acq_r=
el
> from the stack trace.
>=20
> FWIW, the CPU on this system where I get the SIGBUS is Cortex-A76, which
> should support LSE and atomics, but it seems everytime it encounters
> atomics, it just throws a SIGBUS. It works fine on Snapdragon 8cx Gen 3.

That does not make any sense. The only thing I think might happen is that y=
our
structure is not correctly aligned (for example by using a custom memory
allocator). Can you check the address of count when it fails? (should be in=
 the
crash logs, or you can see it in gdb or just printf it).=