From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id EBAA838582A4; Fri, 4 Aug 2023 07:24:08 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org EBAA838582A4 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1691133848; bh=AXqs3tyhFmWn8mHPDvpjVZBtuNvlNNN3WPirEigjf7g=; h=From:To:Subject:Date:In-Reply-To:References:From; b=t7xjBVtqZI6nQ9Q1k+R5dfsI3H1DUXjNZBiPwpYJRJ0fMIpMgwdk0U1aF9gxq20cx cp6u3arfysfQ0KhERT5Tc7GlxTtFZkb6ijkekJTSvIXh3+TaOdxi8CJBXXFcsPNHCw fNpQaWTeVr8rtyB51dU3blkz8W60qGDZTyhwTos0= From: "juzhe.zhong at rivai dot ai" To: gcc-bugs@gcc.gnu.org Subject: [Bug tree-optimization/110897] RISC-V: Fail to vectorize shift Date: Fri, 04 Aug 2023 07:24:08 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: tree-optimization X-Bugzilla-Version: 14.0 X-Bugzilla-Keywords: missed-optimization X-Bugzilla-Severity: normal X-Bugzilla-Who: juzhe.zhong at rivai dot ai X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D110897 --- Comment #4 from JuzheZhong --- (In reply to Richard Biener from comment #3) > it looks like you don't support vector short logical shift? For some rea= son > vect_recog_over_widening_pattern doesn't check whether the demoted operat= ion > is supported ... >=20 > The following helps on x86_64, it disables the demotion. I think the idea > was that we eventually recognize a widening shift, so the narrow operation > itself doesn't need to be supported, but clearly that doesn't work out > when there is no such shift. >=20 Thanks Richi. what is the "vector short logical shift" optab ? Could you give me the optab name? I am gonna try to support this in RISC-V port. > diff --git a/gcc/tree-vect-patterns.cc b/gcc/tree-vect-patterns.cc > index e4ab8c2d65b..4e4191652e3 100644 > --- a/gcc/tree-vect-patterns.cc > +++ b/gcc/tree-vect-patterns.cc > @@ -3091,6 +3091,11 @@ vect_recog_over_widening_pattern (vec_info *vinfo, > if (!new_vectype || !op_vectype) > return NULL; >=20=20 > + optab optab; > + if (!(optab =3D optab_for_tree_code (code, op_vectype, optab_vector)) > + || optab_handler (optab, TYPE_MODE (op_vectype)) =3D=3D CODE_FOR_n= othing) > + return NULL; > + > if (dump_enabled_p ()) > dump_printf_loc (MSG_NOTE, vect_location, "demoting %T to %T\n", > type, new_type); >=20 > with the patch above x86 can vectorize both loops with AVX2 but not witho= ut. >=20 > Can you confirm this helps on RISC-V as well? >=20 > Richard, what was the idea here? Yeah. I can try it after I try "vector short logical shift" pattern.=