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From: "lehua.ding at rivai dot ai" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug tree-optimization/111114] RISC-V: Failed combine extend +
 vcond_mask when modify by vect_recog_over_widening_pattern
Date: Thu, 24 Aug 2023 03:51:03 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D111114

--- Comment #2 from Lehua Ding <lehua.ding at rivai dot ai> ---
(In reply to Andrew Pinski from comment #1)
> There is a match pattern which handles the case where the convert (cast)
> will fold both sides of the vec_cond now (since r14-3337-g70c50c87273d94).
>=20
>   vect__5.14_56 =3D .MASK_LEN_LOAD (vectp_a.12_54, 8B, mask__24.11_52, _6=
7, 0);
>=20
> Is there a way to simplify that with the convert?
>=20
> Or maybe we want to it if one or the other conversion simplifies ....
>=20
> Confirmed.

Thanks for the comments. Can we relax this match by removing the modifier "=
!"?=