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From: "crazylht at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/111333] Runtime failure for fcmulcph instrinsic
Date: Fri, 08 Sep 2023 02:12:19 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D111333

--- Comment #1 from Hongtao.liu <crazylht at gmail dot com> ---
fmulcph/fmaddcph is commutative for operands[1] and operands[2], but
fcmulcph/fcmaddcph is not, since it's Complex conjugate operations.

Below change fixes the issue.

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 6d3ae8dea0c..833546c5228 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -6480,6 +6480,14 @@ (define_int_attr complexpairopname
        [(UNSPEC_COMPLEX_FMA_PAIR "fmaddc")
         (UNSPEC_COMPLEX_FCMA_PAIR "fcmaddc")])

+(define_int_attr int_comm
+       [(UNSPEC_COMPLEX_FMA "%")
+        (UNSPEC_COMPLEX_FMA_PAIR "%")
+        (UNSPEC_COMPLEX_FCMA "")
+        (UNSPEC_COMPLEX_FCMA_PAIR "")
+        (UNSPEC_COMPLEX_FMUL "%")
+        (UNSPEC_COMPLEX_FCMUL "")])
+
 (define_int_attr conj_op
        [(UNSPEC_COMPLEX_FMA "")
         (UNSPEC_COMPLEX_FCMA "_conj")
@@ -6593,7 +6601,7 @@ (define_expand "cmla<conj_op><mode>4"
 (define_insn "fma_<complexopname>_<mode><sdc_maskz_name><round_name>"
   [(set (match_operand:VHF_AVX512VL 0 "register_operand" "=3D&v")
        (unspec:VHF_AVX512VL
-         [(match_operand:VHF_AVX512VL 1 "<round_nimm_predicate>" "%v")
+         [(match_operand:VHF_AVX512VL 1 "<round_nimm_predicate>"
"<int_comm>v")
           (match_operand:VHF_AVX512VL 2 "<round_nimm_predicate>"
"<round_constraint>")
           (match_operand:VHF_AVX512VL 3 "<round_nimm_predicate>" "0")]
           UNSPEC_COMPLEX_F_C_MA))]
@@ -6658,7 +6666,7 @@ (define_insn_and_split
"fma_<complexopname>_<mode>_fma_zero"
 (define_insn "fma_<complexpairopname>_<mode>_pair"
  [(set (match_operand:VF1_AVX512VL 0 "register_operand" "=3D&v")
        (unspec:VF1_AVX512VL
-        [(match_operand:VF1_AVX512VL 1 "vector_operand" "%v")
+        [(match_operand:VF1_AVX512VL 1 "vector_operand" "<int_comm>v")
          (match_operand:VF1_AVX512VL 2 "bcst_vector_operand" "vmBr")
          (match_operand:VF1_AVX512VL 3 "vector_operand" "0")]
          UNSPEC_COMPLEX_F_C_MA_PAIR))]
@@ -6727,7 +6735,7 @@ (define_insn
"<avx512>_<complexopname>_<mode>_mask<round_name>"
   [(set (match_operand:VHF_AVX512VL 0 "register_operand" "=3D&v")
        (vec_merge:VHF_AVX512VL
          (unspec:VHF_AVX512VL
-           [(match_operand:VHF_AVX512VL 1 "nonimmediate_operand" "%v")
+           [(match_operand:VHF_AVX512VL 1 "nonimmediate_operand"
"<int_comm>v")
             (match_operand:VHF_AVX512VL 2 "nonimmediate_operand"
"<round_constraint>")
             (match_operand:VHF_AVX512VL 3 "register_operand" "0")]
             UNSPEC_COMPLEX_F_C_MA)
@@ -6752,7 +6760,7 @@ (define_expand "cmul<conj_op><mode>3"
 (define_insn "<avx512>_<complexopname>_<mode><maskc_name><round_name>"
   [(set (match_operand:VHF_AVX512VL 0 "register_operand" "=3D&v")
          (unspec:VHF_AVX512VL
-           [(match_operand:VHF_AVX512VL 1 "nonimmediate_operand" "%v")
+           [(match_operand:VHF_AVX512VL 1 "nonimmediate_operand"
"<int_comm>v")
             (match_operand:VHF_AVX512VL 2 "nonimmediate_operand"
"<round_constraint>")]
             UNSPEC_COMPLEX_F_C_MUL))]
   "TARGET_AVX512FP16 && <round_mode512bit_condition>"=