[Bug middle-end/111395] New: RISC-V Vector Fortran: ICE in get_avl_or_vl_reg (vsetvl pass)

[Bug middle-end/111395] New: RISC-V Vector Fortran: ICE in get_avl_or_vl_reg (vsetvl pass)

[jeremy.bennett at embecosm dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111395

            Bug ID: 111395
           Summary: RISC-V Vector Fortran: ICE in get_avl_or_vl_reg
                    (vsetvl pass)
           Product: gcc
           Version: 14.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: middle-end
          Assignee: unassigned at gcc dot gnu.org
          Reporter: jeremy.bennett at embecosm dot com
  Target Milestone: ---

Created attachment 55887
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=55887&action=edit
Reproducer

Found because of failure of SPEC CPU 2017 621_wrf_s to compile.

This appears to be related to
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=11137, which is now resolved.

Reproducer (test.f90):

MODULE a
  REAL b
CONTAINS
  SUBROUTINE c(d,KTE)
    REAL,DIMENSION(KTE) :: d,e,f,g
    REAL,DIMENSION(KTE) :: h
    i : DO j=1,b
       z=k
       DO l=m,n
          IF(o>=p)THEN
             IF(l<L0)THEN
                q=z/0
             ENDIF
             e=q
             f=EXP(r            )
          ENDIF
       ENDDO
       s : DO t=1,2
          DO l=m,u
             v=v+l
          ENDDO
          IF(w<=x)THEN
             DO l=w,x
                g=y
             ENDDO
          ENDIF
       ENDDO  s
       aa=v
       ab=ac/aa
       k=ad/ab
    ENDDO  i
    IF(ae>af)THEN
       DO l=m,n
          d=h
       ENDDO
    ENDIF
  END SUBROUTINE c
END MODULE a

Compile with:

riscv64-unknown-linux-gnu-gfortran -w -march=rv64gcv -mabi=lp64d -c -Ofast \
    -ftree-vectorize --param=riscv-autovec-preference=scalable test.f90

Output:

during RTL pass: vsetvl
test.f90:37:18:

   37 |   END SUBROUTINE c
      |                  ^
internal compiler error: in get_avl_or_vl_reg, at
config/riscv/riscv-vsetvl.cc:2297
0x9a24e5 riscv_vector::vector_insn_info::get_avl_or_vl_reg() const
        /home/jeremy/gittrees/mustang/gcc/gcc/config/riscv/riscv-vsetvl.cc:2297
0x9a24e5 riscv_vector::vector_insn_info::get_avl_or_vl_reg() const
        /home/jeremy/gittrees/mustang/gcc/gcc/config/riscv/riscv-vsetvl.cc:2271
0x16102f7 insert_vsetvl
        /home/jeremy/gittrees/mustang/gcc/gcc/config/riscv/riscv-vsetvl.cc:724
0x1610edd pass_vsetvl::commit_vsetvls()
        /home/jeremy/gittrees/mustang/gcc/gcc/config/riscv/riscv-vsetvl.cc:3615
0x1611191 pass_vsetvl::pre_vsetvl()
        /home/jeremy/gittrees/mustang/gcc/gcc/config/riscv/riscv-vsetvl.cc:3728
0x1611ed8 pass_vsetvl::lazy_vsetvl()
        /home/jeremy/gittrees/mustang/gcc/gcc/config/riscv/riscv-vsetvl.cc:4360
0x1612031 pass_vsetvl::execute(function*)
        /home/jeremy/gittrees/mustang/gcc/gcc/config/riscv/riscv-vsetvl.cc:4395
0x1612031 pass_vsetvl::execute(function*)
        /home/jeremy/gittrees/mustang/gcc/gcc/config/riscv/riscv-vsetvl.cc:4376
Please submit a full bug report, with preprocessed source (by using
-freport-bug).
Please include the complete backtrace with any bug report.
See <https://gcc.gnu.org/bugs/> for instructions.

System information
------------------

Using built-in specs.
COLLECT_GCC=riscv64-unknown-linux-gnu-gcc
COLLECT_LTO_WRAPPER=/home/jeremy/gittrees/mustang/install/libexec/gcc/riscv64-unknown-linux-gnu/14.0.0/lto-wrapper
Target: riscv64-unknown-linux-gnu
Configured with: /home/jeremy/gittrees/mustang/gcc/configure
--target=riscv64-unknown-linux-gnu
--prefix=/home/jeremy/gittrees/mustang/install
--with-sysroot=/home/jeremy/gittrees/mustang/install/sysroot
--with-pkgversion=g35f498d8dfc --with-system-zlib --enable-shared --enable-tls
--enable-languages=c,c++,fortran --disable-libmudflap --disable-libssp
--disable-libquadmath --disable-libsanitizer --disable-nls --disable-bootstrap
--src=/home/jeremy/gittrees/mustang/gcc --enable-multilib --with-abi=lp64d
--with-arch=rv64gc --with-tune= --with-isa-spec=20191213 'CFLAGS_FOR_TARGET=-O2
   -mcmodel=medany' 'CXXFLAGS_FOR_TARGET=-O2    -mcmodel=medany'
Thread model: posix
Supported LTO compression algorithms: zlib
gcc version 14.0.0 20230912 (experimental) (g35f498d8dfc) 

Tool chain built with component commits:

Repository           SHA-1 hash (commit ID)                  
----------           ----------------------                  
gcc                  35f498d8dfc8e579eaba2ff2d2b96769c632fd58
binutils-gdb         318d3bda5cad124bd11eebb0349d0f183ba625b1
glibc                073edbdfabaad4786e974a451efe4b6b3f7a5a61

[Bug middle-end/111395] RISC-V Vector Fortran: ICE in get_avl_or_vl_reg (vsetvl pass)

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111395

--- Comment #1 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Pan Li <panli@gcc.gnu.org>:

https://gcc.gnu.org/g:53ad1bd520759580b9a5cc590a81a1a30b9e2e28

commit r14-3979-g53ad1bd520759580b9a5cc590a81a1a30b9e2e28
Author: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Date:   Thu Sep 14 15:52:13 2023 +0800

    RISC-V: Fix ICE in get_avl_or_vl_reg

    update v1 -> v2: Add available fortran compiler check in rvv-fortran.exp.

    This patch fix https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111395 ICE

    update v2 -> v3: Remove redundant format.

            PR target/111395

    gcc/ChangeLog:

            * config/riscv/riscv-vsetvl.cc (avl_info::operator==): Fix ICE.
            (vector_insn_info::global_merge): Ditto.
            (vector_insn_info::get_avl_or_vl_reg): Ditto.

    gcc/testsuite/ChangeLog:

            * gcc.target/riscv/rvv/fortran/pr111395.f90: New test.
            * gcc.target/riscv/rvv/rvv-fortran.exp: New test.

[Bug middle-end/111395] RISC-V Vector Fortran: ICE in get_avl_or_vl_reg (vsetvl pass)

[jeremy.bennett at embecosm dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111395

Jeremy Bennett <jeremy.bennett at embecosm dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|---                         |FIXED
             Status|UNCONFIRMED                 |RESOLVED

--- Comment #2 from Jeremy Bennett <jeremy.bennett at embecosm dot com> ---
I can confirm this issue is resolved. Thanks.