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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/111404] [AArch64] 128-bit __sync_val_compare_and_swap is
 not atomic
Date: Thu, 30 Nov 2023 16:45:01 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D111404

--- Comment #2 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Wilco Dijkstra <wilco@gcc.gnu.org>:

https://gcc.gnu.org/g:df8958e6bc5d050dab8bdc5954c1632fb0e98d18

commit r14-6021-gdf8958e6bc5d050dab8bdc5954c1632fb0e98d18
Author: Wilco Dijkstra <wilco.dijkstra@arm.com>
Date:   Thu Nov 30 16:14:35 2023 +0000

    AArch64: Fix __sync_val_compare_and_swap [PR111404]

    __sync_val_compare_and_swap may be used on 128-bit types and either cal=
ls
the
    outline atomic code or uses an inline loop.  On AArch64 LDXP is only at=
omic
if
    the value is stored successfully using STXP, but the current
implementations
    do not perform the store if the comparison fails.  In this case the val=
ue
    returned is not read atomically.

    gcc/ChangeLog:
            PR target/111404
            * config/aarch64/aarch64.cc (aarch64_split_compare_and_swap):
            For 128-bit store the loaded value and loop if needed.

    libgcc/ChangeLog:
            PR target/111404
            * config/aarch64/lse.S (__aarch64_cas16_acq_rel): Execute STLXP
using
            either new value or loaded value.=