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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug target/111451] RISC-V: Missed optimization of vrgather.vv into vrgatherei16.vv Date: Fri, 22 Sep 2023 04:20:08 +0000 [thread overview] Message-ID: <bug-111451-4-5hLMDKURWL@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-111451-4@http.gcc.gnu.org/bugzilla/> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111451 --- Comment #3 from CVS Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Li Xu <xuli@gcc.gnu.org>: https://gcc.gnu.org/g:0ed05db7cee8f92604b5d7761713b7a7161e0db0 commit r14-4219-g0ed05db7cee8f92604b5d7761713b7a7161e0db0 Author: xuli <xuli1@eswincomputing.com> Date: Fri Sep 22 01:25:39 2023 +0000 RISC-V: Optimization of vrgather.vv into vrgatherei16.vv[PR111451] Consider this following case: typedef int32_t vnx32si __attribute__ ((vector_size (128))); __attribute__ ((noipa)) void permute_##TYPE (TYPE values1, TYPE values2, \ TYPE *out) \ { \ TYPE v \ = __builtin_shufflevector (values1, values2, MASK_##NUNITS (0, NUNITS)); \ *(TYPE *) out = v; \ } T (vnx32si, 32) \ TEST_ALL (PERMUTE) Before this patch: li a4,31 vsetvli a5,zero,e32,m8,ta,ma vl8re32.v v24,0(a0) vid.v v8 vrsub.vx v8,v8,a4 vrgather.vv v16,v24,v8 vs8r.v v16,0(a2) ret The index vector register "v8" occupies 8 registers. We should optimize it into vrgatherei16.vv which is using int16 as the index elements. After this patch: vsetvli a5,zero,e16,m4,ta,ma li a4,31 vid.v v4 vl8re32.v v16,0(a0) vrsub.vx v4,v4,a4 vsetvli zero,zero,e32,m8,ta,ma vrgatherei16.vv v8,v16,v4 vs8r.v v8,0(a2) ret With vrgatherei16.vv, the v8 will occupy 4 registers instead of 8. Lower the register consuming and register pressure. PR target/111451 gcc/ChangeLog: * config/riscv/riscv-v.cc (emit_vlmax_gather_insn): Optimization of vrgather.vv into vrgatherei16.vv. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vls-vlmax/perm-4.c: Adjust case. * gcc.target/riscv/rvv/autovec/vls/perm-4.c: Ditto.
next prev parent reply other threads:[~2023-09-22 4:20 UTC|newest] Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-09-18 3:24 [Bug c/111451] New: " juzhe.zhong at rivai dot ai 2023-09-21 8:23 ` [Bug target/111451] " juzhe.zhong at rivai dot ai 2023-09-21 8:28 ` juzhe.zhong at rivai dot ai 2023-09-22 4:20 ` cvs-commit at gcc dot gnu.org [this message] 2023-09-22 7:20 ` juzhe.zhong at rivai dot ai
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