From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 4C3283853D05; Tue, 19 Sep 2023 21:18:13 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 4C3283853D05 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1695158293; bh=6+Nj2lLGlH92HPXfRI9uQQvLUjjUKjPlESJmlP6zyjU=; h=From:To:Subject:Date:In-Reply-To:References:From; b=LaY4o3JzhxAHGmZbl4N/PRdXBAyR55uFbXpNydIKFDw0x7Uesmtql8i16KfW5XVma ew29Ifh6T4QZUUid+kgBVeWjDPUf1HdGvlS082b2Lzd0Yj7Uwt/6shM09GrqFu4LCO qQYyI+QZAn4u5RN4DxK/YXhi4SaRzajjCRaH31iA= From: "cvs-commit at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/111461] [14.0 Regression] RISC-V rv32gc bootstrap ICEs with --enable-checking=rtl Date: Tue, 19 Sep 2023 21:18:06 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 14.0 X-Bugzilla-Keywords: X-Bugzilla-Severity: normal X-Bugzilla-Who: cvs-commit at gcc dot gnu.org X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: 14.0 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D111461 --- Comment #1 from CVS Commits --- The master branch has been updated by Patrick O'Neill : https://gcc.gnu.org/g:5b554c559d0103bfc1a68777907945ec3035a2bd commit r14-4154-g5b554c559d0103bfc1a68777907945ec3035a2bd Author: Patrick O'Neill Date: Tue Sep 19 10:03:35 2023 -0700 RISC-V: Fix --enable-checking=3Drtl ICE on rv32gc bootstrap Resolves PR 111461. during RTL pass: expand offtime.c: In function '__offtime': offtime.c:79:6: internal compiler error: RTL check: expected elt 0 type= 'e' or 'u', have 'w' (rtx const_int) in riscv_legitimize_const_move, at config/riscv/riscv.cc:2176 79 | ip =3D __mon_yday[__isleap(y)]; Tested on rv32gc glibc with --enable-checking=3Drtl. 2023-09-19 Juzhe Zhong gcc/ChangeLog: * config/riscv/riscv.cc (riscv_legitimize_const_move): Eliminate src_op_0 var to avoid rtl check error. Tested-by: Patrick O'Neill =