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* [Bug target/111461] New: [14.0 Regression] RISC-V rv32gc bootstrap ICEs with --enable-checking=rtl
@ 2023-09-18 17:33 patrick at rivosinc dot com
2023-09-19 8:56 ` [Bug target/111461] " rguenth at gcc dot gnu.org
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: patrick at rivosinc dot com @ 2023-09-18 17:33 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111461
Bug ID: 111461
Summary: [14.0 Regression] RISC-V rv32gc bootstrap ICEs with
--enable-checking=rtl
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: patrick at rivosinc dot com
Target Milestone: ---
Created attachment 55923
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=55923&action=edit
Backtrace
Bootstrap fails with an ICE.
during RTL pass: expand
offtime.c: In function '__offtime':
offtime.c:79:6: internal compiler error: RTL check: expected elt 0 type 'e' or
'u', have 'w' (rtx const_int) in riscv_legitimize_const_move, at
config/riscv/riscv.cc:2176
79 | ip = __mon_yday[__isleap(y)];
| ~~~^~~~~~~~~~~~~~~~~~~~~~~~~
Caused by: r14-3548-gd16af3ebea8
^ permalink raw reply [flat|nested] 4+ messages in thread* [Bug target/111461] [14.0 Regression] RISC-V rv32gc bootstrap ICEs with --enable-checking=rtl 2023-09-18 17:33 [Bug target/111461] New: [14.0 Regression] RISC-V rv32gc bootstrap ICEs with --enable-checking=rtl patrick at rivosinc dot com @ 2023-09-19 8:56 ` rguenth at gcc dot gnu.org 2023-09-19 21:18 ` cvs-commit at gcc dot gnu.org 2023-09-19 21:21 ` patrick at rivosinc dot com 2 siblings, 0 replies; 4+ messages in thread From: rguenth at gcc dot gnu.org @ 2023-09-19 8:56 UTC (permalink / raw) To: gcc-bugs https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111461 Richard Biener <rguenth at gcc dot gnu.org> changed: What |Removed |Added ---------------------------------------------------------------------------- Target Milestone|--- |14.0 Target| |riscv ^ permalink raw reply [flat|nested] 4+ messages in thread
* [Bug target/111461] [14.0 Regression] RISC-V rv32gc bootstrap ICEs with --enable-checking=rtl 2023-09-18 17:33 [Bug target/111461] New: [14.0 Regression] RISC-V rv32gc bootstrap ICEs with --enable-checking=rtl patrick at rivosinc dot com 2023-09-19 8:56 ` [Bug target/111461] " rguenth at gcc dot gnu.org @ 2023-09-19 21:18 ` cvs-commit at gcc dot gnu.org 2023-09-19 21:21 ` patrick at rivosinc dot com 2 siblings, 0 replies; 4+ messages in thread From: cvs-commit at gcc dot gnu.org @ 2023-09-19 21:18 UTC (permalink / raw) To: gcc-bugs https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111461 --- Comment #1 from CVS Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Patrick O'Neill <poneill@gcc.gnu.org>: https://gcc.gnu.org/g:5b554c559d0103bfc1a68777907945ec3035a2bd commit r14-4154-g5b554c559d0103bfc1a68777907945ec3035a2bd Author: Patrick O'Neill <patrick@rivosinc.com> Date: Tue Sep 19 10:03:35 2023 -0700 RISC-V: Fix --enable-checking=rtl ICE on rv32gc bootstrap Resolves PR 111461. during RTL pass: expand offtime.c: In function '__offtime': offtime.c:79:6: internal compiler error: RTL check: expected elt 0 type 'e' or 'u', have 'w' (rtx const_int) in riscv_legitimize_const_move, at config/riscv/riscv.cc:2176 79 | ip = __mon_yday[__isleap(y)]; Tested on rv32gc glibc with --enable-checking=rtl. 2023-09-19 Juzhe Zhong <juzhe.zhong@rivai.ai> gcc/ChangeLog: * config/riscv/riscv.cc (riscv_legitimize_const_move): Eliminate src_op_0 var to avoid rtl check error. Tested-by: Patrick O'Neill <patrick@rivosinc.com> ^ permalink raw reply [flat|nested] 4+ messages in thread
* [Bug target/111461] [14.0 Regression] RISC-V rv32gc bootstrap ICEs with --enable-checking=rtl 2023-09-18 17:33 [Bug target/111461] New: [14.0 Regression] RISC-V rv32gc bootstrap ICEs with --enable-checking=rtl patrick at rivosinc dot com 2023-09-19 8:56 ` [Bug target/111461] " rguenth at gcc dot gnu.org 2023-09-19 21:18 ` cvs-commit at gcc dot gnu.org @ 2023-09-19 21:21 ` patrick at rivosinc dot com 2 siblings, 0 replies; 4+ messages in thread From: patrick at rivosinc dot com @ 2023-09-19 21:21 UTC (permalink / raw) To: gcc-bugs https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111461 Patrick O'Neill <patrick at rivosinc dot com> changed: What |Removed |Added ---------------------------------------------------------------------------- Status|UNCONFIRMED |RESOLVED Resolution|--- |FIXED --- Comment #2 from Patrick O'Neill <patrick at rivosinc dot com> --- Fixed on trunk. ^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2023-09-19 21:21 UTC | newest] Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2023-09-18 17:33 [Bug target/111461] New: [14.0 Regression] RISC-V rv32gc bootstrap ICEs with --enable-checking=rtl patrick at rivosinc dot com 2023-09-19 8:56 ` [Bug target/111461] " rguenth at gcc dot gnu.org 2023-09-19 21:18 ` cvs-commit at gcc dot gnu.org 2023-09-19 21:21 ` patrick at rivosinc dot com
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