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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug middle-end/111548] RISC-V Vector: ICE in validate_change_or_fail (vsetvl pass) Date: Mon, 25 Sep 2023 06:12:13 +0000 [thread overview] Message-ID: <bug-111548-4-mtdjzv2Cac@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-111548-4@http.gcc.gnu.org/bugzilla/> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111548 --- Comment #1 from CVS Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Pan Li <panli@gcc.gnu.org>: https://gcc.gnu.org/g:9d5f20fc4a6b3254d2d379309193da4be2747987 commit r14-4248-g9d5f20fc4a6b3254d2d379309193da4be2747987 Author: Juzhe-Zhong <juzhe.zhong@rivai.ai> Date: Sun Sep 24 11:17:01 2023 +0800 RISC-V: Fix AVL/VL bug of VSETVL PASS[PR111548] This patch fixes that AVL/VL reg incorrect fetch in VSETVL PASS. C/C++ regression passed. But gfortran didn't run yet. I am still finding a way to run it. Will commit it when I pass the fortran regression. PR target/111548 gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc (earliest_pred_can_be_fused_p): Bugfix gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/pr111548.c: New test.
next prev parent reply other threads:[~2023-09-25 6:12 UTC|newest] Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-09-23 13:16 [Bug middle-end/111548] New: " jeremy.bennett at embecosm dot com 2023-09-25 6:12 ` cvs-commit at gcc dot gnu.org [this message] 2023-10-03 8:28 ` [Bug middle-end/111548] " jeremy.bennett at embecosm dot com
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