From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <gcc-bugzilla@gcc.gnu.org>
Received: by sourceware.org (Postfix, from userid 48)
	id 60B373858C00; Mon,  9 Oct 2023 01:12:14 +0000 (GMT)
DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 60B373858C00
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org;
	s=default; t=1696813934;
	bh=fOu2iXHq7e/7nUugeac19ZryFSpZkTCkdbM0XNRX5Fc=;
	h=From:To:Subject:Date:In-Reply-To:References:From;
	b=iR6fj78T8oUCk8X5BIGQewKzZQxyh6b2Q5t+ZewQB7V9iPvKO3Fo6YN4wUcOihlwq
	 FSjczU3FencOlD2ssBQERZreIn9aTB+vMBOlWlNfkdKurY1nzNTEU7K9azEUrLW5hr
	 g8jrqbB1qOvJGHxS41jB9Afr7yNCGx+M5zrW0yrM=
From: "juzhe.zhong at rivai dot ai" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug middle-end/111621] [RISC-V] Bad register allocation in vadd.vi
 may cause operational error
Date: Mon, 09 Oct 2023 01:12:13 +0000
X-Bugzilla-Reason: CC
X-Bugzilla-Type: changed
X-Bugzilla-Watch-Reason: None
X-Bugzilla-Product: gcc
X-Bugzilla-Component: middle-end
X-Bugzilla-Version: 14.0
X-Bugzilla-Keywords: 
X-Bugzilla-Severity: normal
X-Bugzilla-Who: juzhe.zhong at rivai dot ai
X-Bugzilla-Status: UNCONFIRMED
X-Bugzilla-Resolution: 
X-Bugzilla-Priority: P3
X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org
X-Bugzilla-Target-Milestone: ---
X-Bugzilla-Flags: 
X-Bugzilla-Changed-Fields: cc
Message-ID: <bug-111621-4-gjzu8Yix0o@http.gcc.gnu.org/bugzilla/>
In-Reply-To: <bug-111621-4@http.gcc.gnu.org/bugzilla/>
References: <bug-111621-4@http.gcc.gnu.org/bugzilla/>
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable
X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/
Auto-Submitted: auto-generated
MIME-Version: 1.0
List-Id: <gcc-bugs.sourceware.org>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D111621

JuzheZhong <juzhe.zhong at rivai dot ai> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |juzhe.zhong at rivai dot ai

--- Comment #3 from JuzheZhong <juzhe.zhong at rivai dot ai> ---
I don't think this is a bug.

You are using  __riscv_vadd_vx_i32m4_m.

The vd is not necessary same as vs2 and this intrinsic is supposed to use
TAMA which means that the tailed element and mask-inactive elements are
agnostic (can be either all ones or original value).

So the codegen is correct even though -O0 result is different from -O2/-O3.

If you want to use make vd same as vs2, you should use these following
intrinsics:

__riscv_vadd_vx_i32m4_tu
__riscv_vadd_vx_i32m4_mu
__riscv_vadd_vx_i32m4_tumu=