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From: "patrick at rivosinc dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/111634] New: RISC-V vector: ICE RTL check: expected code
 'reg', have 'lo_sum' in rhs_regno, at rtl.h:1934
Date: Thu, 28 Sep 2023 18:59:46 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D111634

            Bug ID: 111634
           Summary: RISC-V vector: ICE RTL check: expected code 'reg',
                    have 'lo_sum' in rhs_regno, at rtl.h:1934
           Product: gcc
           Version: 14.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: patrick at rivosinc dot com
  Target Milestone: ---

Created attachment 56011
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=3D56011&action=3Dedit
-freport-bug output

RTL check fails on testsuite/gcc.dg/pr109417.c -O3

Found using r14-4312-g8552dcd8e44 rv64gcv lp64d --enable-checking=3Drtl

Does not occur when GCC is compiled using rv64gc lp64d --enable-checking=3D=
rtl

during RTL pass: expand
../gcc/gcc/testsuite/gcc.dg/pr109417.c: In function 'main':
../gcc/gcc/testsuite/gcc.dg/pr109417.c:17:17: internal compiler error: RTL
check: expected code 'reg', have 'lo_sum' in rhs_regno, at rtl.h:1934
0x956453 rtl_check_failed_code1(rtx_def const*, rtx_code, char const*, int,
char const*)
        ../../../gcc/gcc/rtl.cc:770
0x9833f5 rhs_regno(rtx_def const*)
        ../../../gcc/gcc/rtl.h:1934
0x985924 rhs_regno(rtx_def const*)
        ../../../gcc/gcc/config/riscv/riscv.cc:2058
0x985924 riscv_legitimize_address
        ../../../gcc/gcc/config/riscv/riscv.cc:2045
0xf58089 memory_address_addr_space(machine_mode, rtx_def*, unsigned char)
        ../../../gcc/gcc/explow.cc:477
0xf3e6ba change_address_1
        ../../../gcc/gcc/emit-rtl.cc:2294
0xf40d7c offset_address(rtx_def*, rtx_def*, unsigned long)
        ../../../gcc/gcc/emit-rtl.cc:2532
0xf8a321 expand_assignment(tree_node*, tree_node*, bool)
        ../../../gcc/gcc/expr.cc:5734
0xe5c075 expand_gimple_stmt_1
        ../../../gcc/gcc/cfgexpand.cc:3946
0xe5c075 expand_gimple_stmt
        ../../../gcc/gcc/cfgexpand.cc:4044
0xe61927 expand_gimple_basic_block
        ../../../gcc/gcc/cfgexpand.cc:6100
0xe63bd6 execute
        ../../../gcc/gcc/cfgexpand.cc:6835=