From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 287733857C4A; Tue, 30 Jan 2024 09:30:54 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 287733857C4A DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1706607054; bh=H9hKsKaTuC4X+9gBxnJkJOrkwhXQCFKo+cWVjBUeDrQ=; h=From:To:Subject:Date:In-Reply-To:References:From; b=nV8iEnUBKZbKQMbj2y5YcsilYls2Q6VoMu/ZbAABjVIPH2UlJreJeV2pIThSdi7DL v5AGHtNi3hDgxYctnqhn61fayY50v9cCWnaAilgC0qbyrVkzk2tjNbI3KrOGUHdpcd Wo8gUZ6yfwP1Oii1wWVBNjmhbBA/lsGLOVNuR6wU= From: "acoplan at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/111677] [12/13 Regression] darktable build on aarch64 fails with unrecognizable insn due to -fstack-protector changes Date: Tue, 30 Jan 2024 09:30:47 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 13.2.0 X-Bugzilla-Keywords: ice-on-valid-code, needs-bisection X-Bugzilla-Severity: normal X-Bugzilla-Who: acoplan at gcc dot gnu.org X-Bugzilla-Status: ASSIGNED X-Bugzilla-Resolution: X-Bugzilla-Priority: P1 X-Bugzilla-Assigned-To: acoplan at gcc dot gnu.org X-Bugzilla-Target-Milestone: 12.4 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: assigned_to bug_status Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D111677 Alex Coplan changed: What |Removed |Added ---------------------------------------------------------------------------- Assignee|unassigned at gcc dot gnu.org |acoplan at gcc dot = gnu.org Status|NEW |ASSIGNED --- Comment #22 from Alex Coplan --- (In reply to Richard Sandiford from comment #21) >=20 > aarch64_get_separate_components is supposed to vet shrink-wrappable > offsets, but in this case the offset looks valid, since: >=20 > str q22, [sp, #512] >=20 > is a valid instruction. Perhaps the constraints are too narrow? Yeah, as discussed offline, for T{I,F}mode we deliberately restrict the ran= ge to the ldp x-reg range, since at least for TImode we don't know pre-RA how = it will be allocated (a single q reg or a pair of x regs). We could look at using a different mode for the save that doesn't have those restrictions, I'll try to do that.=