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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug tree-optimization/111751] RISC-V: RVV unexpected vectorization
Date: Tue, 10 Oct 2023 12:22:30 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D111751

--- Comment #20 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The trunk branch has been updated by Lehua Ding <lhtin@gcc.gnu.org>:

https://gcc.gnu.org/g:5255273ee8b14ea565eb43f067a86370d25df114

commit r14-4538-g5255273ee8b14ea565eb43f067a86370d25df114
Author: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Date:   Tue Oct 10 20:15:35 2023 +0800

    RISC-V: Add VLS BOOL mode vcond_mask[PR111751]

    Richard patch resolve PR111751:
https://gcc.gnu.org/git/?p=3Dgcc.git;a=3Dcommit;h=3D7c76c876e917a1f20a788f6=
02cc78fff7d0a2a65

    which cause ICE in RISC-V regression:

    FAIL: gcc.dg/torture/pr53144.c   -O2  (internal compiler error: in
gimple_expand_vec_cond_expr, at gimple-isel.cc:328)
    FAIL: gcc.dg/torture/pr53144.c   -O2  (test for excess errors)
    FAIL: gcc.dg/torture/pr53144.c   -O2 -flto -fno-use-linker-plugin
-flto-partition=3Dnone  (internal compiler error: in gimple_expand_vec_cond=
_expr,
at gimple-isel.cc:328)
    FAIL: gcc.dg/torture/pr53144.c   -O2 -flto -fno-use-linker-plugin
-flto-partition=3Dnone  (test for excess errors)
    FAIL: gcc.dg/torture/pr53144.c   -O3 -fomit-frame-pointer -funroll-loops
-fpeel-loops -ftracer -finline-functions  (internal compiler error: in
gimple_expand_vec_cond_expr, at gimple-isel.cc:328)
    FAIL: gcc.dg/torture/pr53144.c   -O3 -fomit-frame-pointer -funroll-loops
-fpeel-loops -ftracer -finline-functions  (test for excess errors)
    FAIL: gcc.dg/torture/pr53144.c   -O3 -g  (internal compiler error: in
gimple_expand_vec_cond_expr, at gimple-isel.cc:328)
    FAIL: gcc.dg/torture/pr53144.c   -O3 -g  (test for excess errors)

    VLS BOOL modes vcond_mask is needed to fix this regression ICE.

    More details: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D111751

    Tested and Committed.

            PR target/111751

    gcc/ChangeLog:

            * config/riscv/autovec.md: Add VLS BOOL modes.=