From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 570913858C2F; Thu, 12 Oct 2023 06:59:56 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 570913858C2F DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1697093996; bh=puh/EGpbUoodjG5Ww0dbpMpceDes/TIGnnA5YAE1viE=; h=From:To:Subject:Date:In-Reply-To:References:From; b=ErEG+vNNIBNHpIfStKwHVQg9cLiNqpW2Pe66hqBoIt7St4LuH1ckM1pUyYoSNRRI9 w2/QkHH+nnqN6uARehZjR/bRfQT9PoGIsmo9Ct2kXe1VDEpW3suB3T7A9vBes0BNIW Z089X9+09zjnB4O4QwMIfl3Z5LwT3fE4lp+7seeE= From: "amonakov at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/111768] X86: -march=native does not support alder lake big.little cache infor correctly Date: Thu, 12 Oct 2023 06:59:55 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 14.0 X-Bugzilla-Keywords: build X-Bugzilla-Severity: normal X-Bugzilla-Who: amonakov at gcc dot gnu.org X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: cc Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D111768 Alexander Monakov changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |amonakov at gcc dot gnu.org --- Comment #7 from Alexander Monakov --- I'm afraid hybrid CPUs with varying ISA feature sets are not practical for = the current ecosystem: you wouldn't be able to reschedule from a higher- to lower-capable core. Not to mention scenarios like Mesa on-disk llvmpipe sha= der cache. "Always" probing all cores is a not a good idea (the compiler would have to manually reschedule itself to all cores, of which there could be hundreds). Plus, portable API for such probing across available cores does not exist afaik. I think releasing an x86 hybrid CPU with varying capabilities across cores would require substantial preparatory work in the kernel and likely in the userland as well, so probably best to leave it until the time comes and specifics of what can differ are known.=