From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id D862A3858D38; Fri, 8 Mar 2024 12:59:51 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org D862A3858D38 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1709902791; bh=O7wmGEGuRamyBOXJxHf8u09NHYkk1+hmPhawZa3xx+o=; h=From:To:Subject:Date:In-Reply-To:References:From; b=S/v3Cg17+ISHQJ7aUokrkeyzBw0OumYqfTq4GEWL7Su/7co4lPxjkWuIg8TUQ/aIh NEQL012AtxK8NmbysTTELh4m1lPBnt78AU2DlVPwEUwmlW0YOsU1qL4bhacZjKSVHi q9uGBrMzN/dACl9xEtGS1/B8veSZzRG2l5pR0Jqw= From: "ubizjak at gmail dot com" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/111822] [12/13/14 Regression] during RTL pass: lr_shrinkage ICE: in operator[], at vec.h:910 with -O2 -m32 -flive-range-shrinkage -fno-dce -fnon-call-exceptions since r12-5301-g045206450386bc Date: Fri, 08 Mar 2024 12:59:51 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 14.0 X-Bugzilla-Keywords: EH, ice-on-valid-code, wrong-code X-Bugzilla-Severity: normal X-Bugzilla-Who: ubizjak at gmail dot com X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P2 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: 12.4 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: cc Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D111822 Uro=C5=A1 Bizjak changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |liuhongt at gcc dot gnu.org --- Comment #11 from Uro=C5=A1 Bizjak --- (In reply to Richard Biener from comment #10) > The easiest fix would be to refuse applying STV to a insn that > can_throw_internal () (that's an insn that has associated EH info). Upda= ting > in this case would require splitting the BB or at least moving the now > no longer throwing insn to the next block (along the fallthru edge). This would be simply: --cut here-- diff --git a/gcc/config/i386/i386-features.cc b/gcc/config/i386/i386-features.cc index 1de2a07ed75..90acb33db49 100644 --- a/gcc/config/i386/i386-features.cc +++ b/gcc/config/i386/i386-features.cc @@ -437,6 +437,10 @@ scalar_chain::add_insn (bitmap candidates, unsigned int insn_uid, && !HARD_REGISTER_P (SET_DEST (def_set))) bitmap_set_bit (defs, REGNO (SET_DEST (def_set))); + if (cfun->can_throw_non_call_exceptions + && can_throw_internal (insn)) + return false; + /* ??? The following is quadratic since analyze_register_chain iterates over all refs to look for dual-mode regs. Instead this should be done separately for all regs mentioned in the chain once. = */ --cut here-- But I think, we could do better. Adding CC.=