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From: "liuhongt at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/111822] [12/13/14 Regression] during RTL pass: lr_shrinkage ICE: in operator[], at vec.h:910 with -O2 -m32 -flive-range-shrinkage -fno-dce -fnon-call-exceptions since r12-5301-g045206450386bc
Date: Mon, 11 Mar 2024 01:27:46 +0000 [thread overview]
Message-ID: <bug-111822-4-PZ86hB2Tde@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-111822-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111822
--- Comment #16 from Hongtao Liu <liuhongt at gcc dot gnu.org> ---
(In reply to Uroš Bizjak from comment #11)
> (In reply to Richard Biener from comment #10)
> > The easiest fix would be to refuse applying STV to a insn that
> > can_throw_internal () (that's an insn that has associated EH info). Updating
> > in this case would require splitting the BB or at least moving the now
> > no longer throwing insn to the next block (along the fallthru edge).
>
> This would be simply:
>
> --cut here--
> diff --git a/gcc/config/i386/i386-features.cc
> b/gcc/config/i386/i386-features.cc
> index 1de2a07ed75..90acb33db49 100644
> --- a/gcc/config/i386/i386-features.cc
> +++ b/gcc/config/i386/i386-features.cc
> @@ -437,6 +437,10 @@ scalar_chain::add_insn (bitmap candidates, unsigned int
> insn_uid,
> && !HARD_REGISTER_P (SET_DEST (def_set)))
> bitmap_set_bit (defs, REGNO (SET_DEST (def_set)));
>
> + if (cfun->can_throw_non_call_exceptions
> + && can_throw_internal (insn))
> + return false;
> +
> /* ??? The following is quadratic since analyze_register_chain
> iterates over all refs to look for dual-mode regs. Instead this
> should be done separately for all regs mentioned in the chain once. */
> --cut here--
>
> But I think, we could do better. Adding CC.
It looks like the similar issue we have solved in PR89650 with
r9-6543-g12fb7712a8a20f. We manually split the block after insn.
next prev parent reply other threads:[~2024-03-11 1:27 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-15 6:14 [Bug rtl-optimization/111822] New: [12/13/14 Regression] during RTL pass: lr_shrinkage ICE: in operator[], at vec.h:910 with -O2 -m32 -flive-range-shrinkage -fno-dce -fnon-call-exceptions zsojka at seznam dot cz
2023-10-16 7:22 ` [Bug rtl-optimization/111822] " rguenth at gcc dot gnu.org
2023-10-22 23:50 ` pinskia at gcc dot gnu.org
2023-10-23 20:48 ` sjames at gcc dot gnu.org
2023-10-23 22:36 ` [Bug rtl-optimization/111822] [12/13/14 Regression] during RTL pass: lr_shrinkage ICE: in operator[], at vec.h:910 with -O2 -m32 -flive-range-shrinkage -fno-dce -fnon-call-exceptions since r12-5301-g045206450386bc sjames at gcc dot gnu.org
2024-03-07 21:04 ` law at gcc dot gnu.org
2024-03-08 7:01 ` rguenth at gcc dot gnu.org
2024-03-08 7:13 ` zsojka at seznam dot cz
2024-03-08 7:50 ` rguenth at gcc dot gnu.org
2024-03-08 7:50 ` rguenth at gcc dot gnu.org
2024-03-08 8:13 ` [Bug target/111822] " rguenth at gcc dot gnu.org
2024-03-08 9:58 ` ubizjak at gmail dot com
2024-03-08 10:20 ` rguenth at gcc dot gnu.org
2024-03-08 12:59 ` ubizjak at gmail dot com
2024-03-08 13:02 ` rguenth at gcc dot gnu.org
2024-03-08 13:22 ` ubizjak at gmail dot com
2024-03-08 13:28 ` rguenth at gcc dot gnu.org
2024-03-10 10:33 ` ebotcazou at gcc dot gnu.org
2024-03-11 1:27 ` liuhongt at gcc dot gnu.org [this message]
2024-03-14 8:09 ` liuhongt at gcc dot gnu.org
2024-03-18 16:27 ` ubizjak at gmail dot com
2024-03-18 19:41 ` cvs-commit at gcc dot gnu.org
2024-03-19 15:57 ` cvs-commit at gcc dot gnu.org
2024-03-19 16:00 ` cvs-commit at gcc dot gnu.org
2024-03-19 16:01 ` ubizjak at gmail dot com
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