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From: "ubizjak at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/111822] [12/13/14 Regression] during RTL pass:
 lr_shrinkage ICE: in operator[], at vec.h:910 with -O2 -m32
 -flive-range-shrinkage -fno-dce -fnon-call-exceptions since
 r12-5301-g045206450386bc
Date: Fri, 08 Mar 2024 13:22:22 +0000
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X-Bugzilla-Keywords: EH, ice-on-valid-code, wrong-code
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D111822

--- Comment #13 from Uro=C5=A1 Bizjak <ubizjak at gmail dot com> ---
(In reply to Richard Biener from comment #12)

> > But I think, we could do better. Adding CC.
>=20
> We sure could, but I doubt it's too important?  Maybe for Go/Ada.

Preloading stuff is simply loading from the same DImode address, so I'd thi=
nk
that EH_NOTE should be moved from the original insn to the new insn without
much problems.

Please note that on x86_32 split pass is later splitting DImode memory acce=
ss
to two SImode loads, this looks somehow harder problem as far as EH notes a=
re
concerned, as the one above.

I'm not versed in this area, so I'll leave the fix to someone else.=